In short: Reactive ion etching (RIE) combines chemically reactive plasma radicals with directional ion bombardment so that etching proceeds straight down into the wafer, giving the vertical, high-aspect-ratio profiles that plain wet chemistry cannot.
Ask any process engineer why a modern FinFET or a 50:1 DRAM capacitor trench is even manufacturable, and the answer almost always comes back to one tool: the reactive ion etcher. RIE is the workhorse of dry pattern transfer, and understanding how it balances chemistry against physics is one of the clearest ways to reason about anisotropy, selectivity, and profile control in a real fab.
What reactive ion etching actually is
RIE is a plasma etch run in a capacitively coupled reactor. A process gas such as CF4, SF6, Cl2, or HBr is fed into a low-pressure chamber (typically 10–200 mTorr) and an RF field at 13.56 MHz is applied between two electrodes. The wafer sits on the powered electrode. Because electrons are far more mobile than ions, the wafer electrode charges negatively and develops a DC self-bias of tens to hundreds of volts. That bias accelerates positive ions out of the plasma and straight down onto the wafer surface, nearly perpendicular to it.
Two populations do the work. Neutral radicals (for example atomic fluorine from SF6) diffuse everywhere and react chemically with the film. Energetic ions arrive directionally and deliver momentum. Neither alone etches well: pure radical attack is isotropic like wet etch, and pure sputtering is slow and unselective. RIE is powerful precisely because the two act together.
Why RIE is anisotropic: the ion-sidewall synergy
The key mechanism is ion-enhanced etching. Radicals adsorb on every surface, but the chemical reaction only runs to completion where directional ions deliver energy to break bonds and clear reaction products. Trench bottoms get the full ion flux, so they etch fast. Sidewalls see almost no vertical ions, so they barely etch. The result is a vertical wall.
A second, equally important mechanism is sidewall passivation. Many RIE chemistries deliberately deposit a thin polymer or oxide film. In fluorocarbon oxide etches (C4F8/CF4), carbon-rich polymer coats the walls; vertical ion bombardment keeps the floor clean while the walls stay protected. The Bosch process for deep silicon uses this to the extreme, alternating an SF6 etch step with a C4F8 passivation step to reach aspect ratios above 30:1 at the cost of characteristic "scalloped" sidewalls.
Anisotropy is not magic directionality in the chemistry — it is a competition: ions remove passivation and drive reaction on horizontal surfaces faster than radicals can laterally etch the protected walls.
Selectivity: etching the film and not the rest
Selectivity is the ratio of the target film's etch rate to that of the mask or the underlying stop layer. If you are etching 500 nm of silicon with a photoresist mask and the Si:resist selectivity is 5:1, you consume 100 nm of resist — fine. If it were 1:1, the mask would be gone before the etch finished.
Selectivity comes from chemistry. Fluorine etches silicon and SiO2 readily but barely touches a carbon-rich polymer, so a polymerizing chemistry buys oxide-to-silicon or oxide-to-nitride selectivity by letting polymer accumulate on the slower-etching material. There is an unavoidable trade: more passivation raises selectivity and anisotropy but slows the etch and risks etch stop in narrow features.
| Film | Typical gas | Reactive species | Note |
|---|---|---|---|
| Si / poly-Si | SF6, Cl2, HBr | F, Cl | HBr gives smooth, vertical gate etch |
| SiO2 | CF4, C4F8/CO | CFx | polymer tunes oxide:Si selectivity |
| Si3N4 | CHF3/O2 | CFx, F | spacer etch, high N:oxide ratio |
| Al metal | Cl2/BCl3 | Cl | needs post-etch passivation vs. corrosion |
Deep trenches and high aspect ratio etching
As a trench deepens, species transport becomes the limiter. Radicals must diffuse to the bottom and products must diffuse out; this gives aspect-ratio-dependent etching (ARDE), or RIE lag, where narrow features etch slower than wide ones. Ions also scatter off charged sidewalls, producing bowing, undercut, or twisting in very deep structures. Modern DRAM and 3D NAND push capacitor and channel holes past 40:1 and 60:1, which is why high-density-plasma tools (ICP/TCP) decouple plasma density from ion energy and run pulsed bias to manage charging.
RIE lag means a 100 nm trench and a 1 µm trench etched side by side finish at different depths — engineers compensate with timed overetch, pulsed plasma, or bias ramping.
Watching the etch in motion
Where RIE sits in the dry-vs-wet decision
Wet etching is cheaper, gentler, and often more selective, but it is isotropic (except for crystallographic KOH etches) and undercuts the mask by roughly the etch depth. RIE is chosen whenever you need vertical walls, sub-micron critical dimensions, or controllable profile. The deeper comparison, including throughput and damage trade-offs, is laid out in our guide on dry vs wet etching, and the plasma source behind RIE is explored further in our note on ICP vs CCP plasma sources.
In the EDA and DFM world, etch behavior feeds directly back into layout: OPC and etch-bias models in tools from the major vendors (Synopsys, Cadence, Siemens EDA) are calibrated against measured RIE profiles so that the drawn CD matches the etched CD. If you are moving from design toward real silicon, the hands-off etch physics still shapes your sign-off rules — a point we cover with industry partners like ChipXpert's VLSI training.
Common failure modes to recognize
- Trenching / microtrenching: ions reflecting off sidewalls concentrate at the trench corners, cutting a sharp notch into the floor.
- Bowing: sidewall charging deflects ions outward mid-depth, bulging the profile.
- Etch stop: too much passivation in a narrow feature halts the etch entirely.
- Notching: charge build-up at an oxide interface undercuts the base of a line, classic in overetched poly on gate oxide.
Want to run a real etch recipe and read the profiles yourself? CourseTron's Nano Fabrication track walks you through RIE chemistry, Bosch deep-silicon, and profile debugging with worked examples.
FAQ
Is RIE the same as plasma etching?
RIE is a specific type of plasma etching where the wafer sits on the powered electrode and develops a self-bias that makes ion bombardment directional. "Plasma etching" in the narrow sense means the downstream, radical-dominated, isotropic mode. RIE deliberately adds the physical, directional component.
What makes RIE anisotropic while wet etching is isotropic?
Directional ions and sidewall passivation. Ions arrive nearly vertically and only drive the reaction on horizontal surfaces, while deposited polymer protects the walls. Wet chemistry has no preferred direction, so it undercuts the mask equally in all directions.
How do you increase selectivity in an RIE process?
Shift the chemistry toward polymer formation (add C4F8 or CHF3, reduce oxygen), lower the ion energy, or raise pressure. All of these slow the attack on the mask and stop layer relative to the target film — at the cost of etch rate and, often, anisotropy.
Why do deep trenches etch slower than wide ones?
Aspect-ratio-dependent etching (RIE lag): in narrow, deep features the radicals struggle to reach the bottom and the reaction products struggle to leave, so the local etch rate drops as the feature deepens.