Available now · Self-paced

AMBA AXI4-Lite course covering protocol theory, RTL design in Verilog, and RTL verification.

Available now · Self-paced

AMBA AXI4 protocol course covering protocol theory, RTL design in Verilog, and RTL verification.

Available now · Self-paced

AMBA AXI3 protocol course covering protocol theory, RTL design in Verilog, and verification in SystemVerilog.

Curriculum in preparation

Learn AMBA ACE (AXI Coherency Extensions) for cache-coherent multi-processor SoCs. Covers snoop channels, barrier transactions, domain types, ACE-Lite for IO coherency, and integration with ARM CoreLink CCI and CCN interconnects.

Curriculum in preparation

Understand the AMBA CHI (Coherent Hub Interface) protocol for multi-core SoC cache coherency. Covers CHI network layers, transaction types (read, write, snoop), CHI-B and CHI-E specifications, QoS, and integration with ARM CoreLink interconnects.

Curriculum in preparation

Learn the AMBA APB protocol for low-power SoC peripherals. Covers APB2 and APB3 transaction flows, PPROT security extensions, PSTRB byte strobes, APB bridge design, and peripheral register map implementation.

Curriculum in preparation

Master the AMBA AHB (Advanced High-performance Bus) protocol for SoC design. Covers AHB master/slave/arbiter architecture, transfer types, burst transactions, AHB-Lite simplification, and pipeline transfers used widely in microcontrollers and embedded SoCs.

Curriculum in preparation

Learn the AMBA AXI protocol – the backbone of modern SoC designs. Covers AXI4 read/write channels, handshaking, burst types, AXI-Lite for register access, AXI-Stream for data streaming, and AXI interconnect topology. Includes UVM-based AXI verification environment development for real SoC subsystems