In short: Ion implantation is the workhorse doping step of modern CMOS: dopant atoms are ionized, accelerated to a chosen energy, and fired into the silicon wafer, where dose sets how many atoms land and energy sets how deep they stop. A follow-up thermal anneal then repairs the lattice damage and electrically activates the dopants to form precise, shallow p-n junctions.
Ion implantation is a doping technique in which impurity atoms — typically boron, phosphorus, or arsenic — are converted into charged ions and electrostatically accelerated into a semiconductor substrate. Unlike thermal diffusion, where dopants seep in from the surface at high temperature, implantation drives atoms in ballistically. This decouples the two things a process engineer cares about most: how many dopant atoms enter the silicon (the dose) and how deep they go (set by energy). That independent control is exactly why implantation replaced diffusion as the dominant doping method from the 1970s onward.
Every modern integrated circuit relies on it. Source/drain regions, threshold-voltage adjust implants, well formation, and lightly-doped drain (LDD) extensions are all defined by carefully metered implant steps.
The tool is essentially a small particle accelerator built for manufacturing. The dopant source gas (for example BF3, PH3, or AsH3) is ionized in a plasma, and the resulting beam passes through the stages shown below before striking the wafer.
A magnetic field bends the beam; only ions with the correct mass-to-charge ratio follow the right radius and pass through the resolving slit. This is what guarantees you implant, say, 31P+ and not a contaminant or an unwanted molecular species. It is the single most important purity-defining stage in the tool.
Dose is the areal density of implanted ions (ions/cm2). Because each singly-charged ion carries one electronic charge, dose is measured directly by integrating the beam current on the wafer (a Faraday cup) over time — a precise, real-time measurement. Higher beam current or longer time means a higher dose.
Energy, set by the accelerating voltage, controls penetration depth. As ions plow through the crystal they lose energy to both electronic stopping (drag from electrons) and nuclear stopping (billiard-ball collisions with lattice atoms), finally coming to rest at a statistically distributed depth. The average stopping depth is the projected range (Rp), and the spread around it is the straggle (ΔRp). The as-implanted profile is approximately Gaussian, peaking below the surface rather than at it.
If the beam aligns with a crystal axis, ions can slip down open channels in the lattice and travel much deeper than expected, distorting the profile. To suppress this, wafers are tilted (commonly ~7°) and rotated relative to the beam, and a thin screen oxide is often used so the crystal looks amorphous to incoming ions.
Implantation is violent. Each incoming ion knocks silicon atoms off their lattice sites, leaving behind interstitials, vacancies, and — at high dose — a fully amorphized surface layer. Crucially, a dopant atom sitting in a random interstitial position is electrically inactive: it does not yet donate or accept a carrier.
Annealing fixes both problems at once. Heating the wafer lets the lattice recrystallize (solid-phase epitaxial regrowth from the undamaged substrate) and moves dopant atoms onto substitutional lattice sites where they become electrically active. The engineering tension is sharp: you need enough thermal budget to activate and repair, but too much lets dopants diffuse and smear out the shallow junction you worked so hard to place.
That is why the industry moved to rapid thermal anneal (RTA) — seconds at ~1000–1050°C — and then to spike, flash, and laser anneals that reach high temperature for milliseconds or less. The goal is maximum activation with minimum diffusion.
A p-n junction appears wherever the implanted dopant concentration crosses the background doping of the opposite type. Implant phosphorus (n-type) into a p-type wafer and the metallurgical junction sits at the depth where the phosphorus profile falls to the p-type background level. Because implantation places a controlled Gaussian profile at a known depth, the junction location and its abruptness are highly repeatable — the foundation of matched, high-yield transistors.
Shrinking devices demand ever-shallower junctions, which is the core challenge driving low-energy implants, pre-amorphization implants, and millisecond anneals in advanced nodes.
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Explore CourseTron Courses →Because it independently controls dose and depth with high precision, works at low temperature (reducing unwanted diffusion), and can place dopants through masks and thin films. Diffusion couples concentration and depth and cannot reach the shallow, abrupt profiles modern CMOS requires.
Implantation damages the crystal lattice and leaves most dopants in electrically inactive interstitial sites. Annealing recrystallizes the silicon and moves dopants onto substitutional sites so they become active carriers — without it, the doped region conducts poorly.
Dose is how many ions per unit area are implanted (set by beam current and time) and controls the final doping concentration. Energy is the accelerating voltage and controls how deep the ions stop (the projected range).
Channeling is when ions travel abnormally deep by slipping down open columns in an aligned crystal. It is suppressed by tilting the wafer (around 7°), rotating it, pre-amorphizing the surface, or implanting through a screen oxide.
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