Post-Silicon

Counterfeit Semiconductor Testing

By CourseTron Team ·  7 min read ·  Updated Oct 2026 💬 𝕏 in f
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    In short: Catching counterfeit or recycled chips means layering fast, non-destructive screens (external visual inspection, marking-permanency tests, X-ray, decapsulation, electrical parametric checks) against the exact datasheet so that remarked, resurfaced, or used parts are rejected before they reach your board.

    The global electronics supply chain leaks counterfeits at an alarming rate. A single recycled microcontroller pulled from scrapped e-waste, sanded down, and remarked as a new automotive-grade part can pass a casual eyeball test yet fail at -40 °C in the field. This article walks through the practical test flow used by failure-analysis labs and incoming-inspection teams, from the cheapest screen to the most destructive one.

    The Six Categories of Counterfeit

    SAE's AS6171 test standard groups fakes into recycled (used parts resold as new), remarked (relabeled for a higher grade or different part number), overproduced (grey-market), out-of-spec/defective (factory rejects), cloned/reverse-engineered, and tampered (hardware trojans). More than 80% of reported incidents are recycled or remarked parts harvested from electronic waste in uncontrolled reclaim operations. Your detection strategy should be built around catching those two first.

    A recycled part has already seen one or more reflow cycles. Thermal and mechanical stress leaves fingerprints — micro-cracks, oxidized leads, ghost solder, and shifted parametric curves — that a genuine new device simply does not have.

    Step 1 — External Visual Inspection (XVI)

    The first, cheapest line of defense is a high-magnification optical and stereo-microscope pass (typically 10×–200×). Inspectors look for sanding swirl marks, inconsistent package texture, blacktopping (a sprayed epoxy layer hiding the original laser mark), mismatched lead coplanarity, re-tinned leads, and dented corners from desoldering. Under UV, a resurfaced package often fluoresces differently from virgin mold compound because the blacktopping resin is chemically distinct.

    Incoming-Inspection Test Flow (cheap to destructive) ExternalVisual + UVnon-destructive MarkingPermanencysolvent / scrape X-ray +Electricalparametric Decap +Die IDdestructive Pass /Fail low cost, high volumehigh cost, sampled CourseTron · coursetron.com
    Figure 1 — The canonical escalation: cheap non-destructive screens first, destructive confirmation last.

    Step 2 — Marking Permanency and Resurfacing Tests

    Per the EIA/JESD standard methods adapted in AS6171, a cotton swab wet with a defined solvent (often a 1:3 or 3:1 mix of mineral spirits and alcohol, or dynasolve for aggressive checks) is rubbed across the top mark. A genuine laser-etched or permanently inked mark survives; a counterfeit ink reprint smears or lifts. A gentle scrape near an edge exposes blacktopping: if a second, original laser mark appears beneath the black layer, the part is remarked. Acetone should be avoided on some mold compounds because it can damage genuine markings and trigger false rejects.

    Step 3 — X-ray and Acoustic Imaging

    2D/3D X-ray (and scanning acoustic microscopy, SAM, for delamination) lets you see inside without opening the package. You compare the die size, bond-wire count, lead-frame geometry, and paddle shape against a known-good golden sample. Red flags: a die far smaller than the cavity (a cheap die remarked as a premium part), missing or re-bonded wires, voids, or popcorn-crack delamination that betrays prior moisture-driven reflow. SAM C-scans are especially good at revealing the internal cracking that recycled parts accumulate.

    Step 4 — Electrical and Parametric Testing

    This is where recycled parts are most reliably caught. Beyond simple curve-tracing of pin I-V characteristics (to spot ESD damage or latch-up), you run full parametric and functional tests on ATE — Teradyne or Advantest class testers in a production lab — and across the rated temperature range. Techniques include:

    • Curve tracing each pin's protection-diode signature against a golden device; a shifted knee voltage implies a different or stressed die.
    • IDDQ / quiescent current measurement — abnormal leakage flags defective or aged silicon.
    • Temperature sweeps from -40 °C to +125 °C; a part sold as automotive AEC-Q100 grade that drifts out of spec at the extremes is almost certainly a commercial die remarked.
    • SRAM power-on signatures and ring-oscillator frequency as hardware fingerprints — recycled dies show measurable aging shift versus a fresh lot.

    On a real reclaim case, a batch of "new" op-amps passed visual inspection but showed a 15–20% spread in input-offset voltage versus the datasheet's tight ±1 mV — a statistical signature of mixed harvested lots, not a single factory wafer run.

    Temperature sweep: -40 °C to +125 °C -40 °C+43 °C+125 °C Spec parameter must stay inside datasheet limits Genuine AEC-Q100 part: in spec across the whole range remarked part: in spec drifts out at extremes: reject Commercial die sold as automotive grade fails at the extremes CourseTron · coursetron.com
    Figure 3 — Temperature sweep: a commercial die remarked as automotive grade drifts out of spec at the temperature extremes.

    Step 5 — Decapsulation and Die Authentication

    When non-destructive screens are inconclusive, a sacrificial sample is decapped. Chemical decap uses heated fuming nitric or sulfuric acid to dissolve the epoxy and expose the die; laser or plasma decap is gentler on bond wires. Under a microscope you verify the die-mark, foundry logo, mask-revision code, and date against the manufacturer's records. A Microchip die inside a package marked as a Texas Instruments part is an open-and-shut counterfeit. This is destructive, so it is sampled statistically, not applied to every unit.

    Golden device vs. suspect part: I-V curve shift (live) Voltage Current golden suspect CourseTron · coursetron.com
    Figure 2 — Animated: the suspect part's pin I-V curve drifts away from the golden reference as voltage climbs, the hallmark of a stressed or substituted die.

    How the Tests Compare

    TechniqueCatchesDestructive?Relative cost
    External visual + UVResurfacing, blacktopping, prior reflowNoLow
    Marking permanencyRemarked / reprinted labelsNo (minor)Low
    X-ray / SAMWrong die, missing wires, delaminationNoMedium
    Electrical / ATERecycled, out-of-spec, defective siliconNoMedium–High
    DecapsulationDie/foundry substitution, cloningYesHigh

    In practice, strong programs combine these with a trusted silicon design and verification partner upstream and traceability (DNA marking, blockchain provenance, or on-die PUFs) so authentication starts before parts ever enter inspection. For teams building the hands-on test skills, our recycled IC detection deep-dive and failure-analysis fundamentals guides extend this flow into lab practice.

    Want to run these screens yourself on real packages? The CourseTron Post-Silicon Validation & Reliability track covers XVI, decap, ATE parametric testing and more. Explore the courses →

    Frequently Asked Questions

    Can a single test confirm a part is genuine?

    No. Authentication is layered by design. A part that passes visual inspection can still fail electrical testing, and only decapsulation proves the die identity. AS6171 explicitly defines a risk-based combination of methods rather than one silver bullet.

    What is "blacktopping" and why does it matter?

    Blacktopping is a sprayed epoxy coating applied over a sanded package to hide the original laser mark so a new, falsified part number can be printed. It is the single most common signature of a remarked chip and is caught by UV inspection, a solvent test, or a light edge scrape.

    Why are recycled parts dangerous even if they "work"?

    They have already consumed part of their reliability lifetime. Prior thermal cycling causes micro-cracks, wire-bond fatigue, and parametric drift, so the part may function at bench conditions yet fail early in the field, especially across automotive or industrial temperature extremes.

    Do EDA tools from Synopsys or Siemens help with counterfeit detection?

    Indirectly. Siemens Tessent and Synopsys DFT and test-pattern tools generate the structural and IDDQ test vectors that ATE uses to screen suspect silicon, and on-die security/PUF IP helps establish provenance. The physical imaging and decap steps, however, remain lab-based.

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