In short: A probe card is the precision interface between automated test equipment (ATE) and the bare dies on a wafer — it lands tiny cantilever needles or vertical MEMS contacts onto micron-scale bond pads so the tester can power up each die and sort good from bad before the wafer is ever diced.
Every chip you have ever used passed through wafer sort (also called wafer-level test or probe test) long before it was packaged. At this stage hundreds or thousands of identical dies still sit on a single silicon wafer, and the goal is to find the ones that work so money is not wasted packaging failures. The component that makes electrical contact with those dies is the probe card. Understanding it is essential for anyone working in post-silicon validation, product engineering, or test.
What a probe card actually is
A probe card is a custom printed circuit board carrying an array of contact elements whose tips are arranged to exactly match the bond-pad or bump layout of one die (or several dies tested in parallel). It plugs into the test head of an ATE system — such as a Teradyne UltraFLEX or an Advantest V93000 — and sits just above the wafer. A machine called a prober (Tokyo Electron, FormFactor/Cascade, or Accretech) holds the wafer on a vacuum chuck and steps it beneath the card, pressing the pads up into the probe tips with micron-level accuracy.
⚙️ A modern probe card can carry anywhere from a few hundred to over 50,000 probe tips. On fine-pitch HBM or logic devices, pad pitches of 40 µm and tip diameters of 12–25 µm are routine — a human hair is roughly 70 µm across for comparison.
How the needles or MEMS contacts touch the pads
Contact is not a gentle tap. The prober drives the chuck up past first-touch by a controlled distance called overtravel (typically 50–100 µm). This flexes each probe so it exerts a defined force — on the order of 1–5 grams per tip — and, crucially, makes the tip scrub a few microns sideways across the aluminium or copper pad. That scrub motion cracks the thin native oxide (Al₂O₃) that forms instantly on aluminium pads, exposing fresh metal so a low-resistance ohmic contact (ideally <1 Ω) is formed.
Two mechanical families dominate:
- Cantilever (needle) cards — angled tungsten or rhenium-tungsten needles epoxied to the card, buckling like a tiny diving board. Cheap and repairable, ideal for low pin counts and peripheral pad rings.
- Vertical / MEMS cards — lithographically fabricated buckling-beam or spring contacts standing straight up, enabling area-array probing of flip-chip bumps and extreme pin counts at tight pitch.
Which to pick is its own topic — see our deep dive on cantilever vs. vertical probe technology.
The scrub in motion
The animation below shows what overtravel does: the tip lands, then slides laterally as the card is pressed down, scrubbing through the oxide to reach clean metal.
Where it fits in wafer-level testing
The probe card is the mechanical half of a flow the test engineer drives in software. A typical wafer-sort sequence per die looks like this:
| Step | What happens | Typical check |
|---|---|---|
| Contact / continuity | Prober makes contact; ATE checks each pin's protection diode | Opens & shorts |
| Parametric (DC) | Leakage, pin current, power-supply shorts | IDDQ, VOH/VOL |
| Structural | Scan/ATPG patterns from DFT tools shift through the die | Stuck-at, transition faults |
| Memory BIST | On-chip BIST exercises embedded SRAM/HBM | March algorithms |
| Bin & ink | Result mapped to a bin; wafer map updated | Pass / fail / speed grade |
The structural patterns come straight from the design-for-test toolchain — Synopsys TestMAX (DFTMAX/TetraMAX) or Siemens Tessent generate the ATPG vectors and compress them so a few hundred scan chains can be driven through a modest probe-tip budget. The result is a wafer map: a colour-coded grid telling the dicing saw and the back-end which dies to keep.
? Testing multiple dies at once — multi-site or parallel test — is how fabs keep cost down. A card that probes 32 or 64 dies simultaneously cuts index time dramatically, but every extra site multiplies tip count and planarity demands on the card.
Why probe cards are hard engineering
Three constraints make probe-card design a specialist discipline:
- Planarity. Every tip in a 20,000-pin array must touch within a few microns of the same plane, or some pads get crushed while others never connect.
- Current & thermal. Power pads may carry amps; tips heat up, and wafer sort at hot (125 °C) or cold (−40 °C) warps both card and wafer, shifting tip positions by tens of microns.
- Signal integrity. High-speed I/O (PCIe, HBM, DDR) demands controlled-impedance traces right out to the tip, so the card becomes a genuine RF structure, not just a pin holder.
Cleaning matters too: tips accumulate aluminium debris and must be scrubbed on an abrasive cleaning pad every few thousand touchdowns to keep contact resistance stable over a card's multi-million-touchdown life.
Connecting the dots in the flow
Wafer sort feeds everything downstream. The same DFT structures probed here are reused at final package test, and the bin data drives yield analysis. If you are learning the broader picture, our guide to wafer-sort yield and binning explains how that map turns into ship/scrap decisions. For teams that need custom DFT insertion or silicon bring-up support, our design-services partner Avecas VLSI design services handles the test-aware RTL-to-GDSII work that makes a chip probeable in the first place.
? Want hands-on labs with ATE flows, DFT patterns and real wafer-sort data? The CourseTron Post-Silicon Validation course walks you from probe-card mechanics to writing a passing test program.
FAQ
What is the difference between a probe card and a load board?
A probe card contacts bare dies on a wafer during sort; a load board (or DUT board) contacts the pins/balls of an already-packaged part during final test. Both sit on the ATE, but the probe card is paired with a prober and deals with micron-scale pads.
Why do probe tips scrub sideways instead of just pressing down?
Aluminium pads grow an insulating native oxide almost instantly. The lateral scrub, created by overtravel flexing the probe, mechanically cracks that oxide so the tip reaches clean metal and forms a low-resistance contact.
How many times can a probe card be used?
A well-maintained card survives millions of touchdowns, but tips wear and contaminate. Periodic online cleaning and planarity re-qualification keep contact resistance in spec; eventually tips are reworked or the card is retired.
Can one probe card test many chips at once?
Yes — multi-site cards probe tens of dies in parallel to reduce test cost. The trade-off is far higher tip count, tighter planarity, and more channels demanded from the ATE.