In short: PCB thermal management moves heat from a hot junction to ambient air through a low-resistance path of copper pours, thermal vias, and heatsinks — and you design it by budgeting a junction-to-ambient thermal resistance (°C/W) that keeps every device below its rated junction temperature.
A power MOSFET dissipating 3 W on a bare FR-4 island will cook itself long before you reach steady state. Thermal management is not an afterthought you bolt on at the end of layout; it is a resistance network you design in parallel with the electrical one. This article walks through the physics, the layout techniques, and the numbers an engineer actually reaches for.
The thermal resistance model
Heat flow obeys an Ohm's-law analogue: temperature difference is the "voltage," power is the "current," and thermal resistance θ (°C/W) is the resistor. For a device in a package you chain resistances in series:
Tjunction = Tambient + P × (θJC + θCS + θSA)
θJC is junction-to-case (fixed by the die and package), θCS is case-to-sink (set by your thermal interface material), and θSA is sink-to-ambient (what the PCB copper and any heatsink provide). If a device dissipates 2 W, has θJC = 1.5 °C/W, and you need TJ below 125 °C in a 70 °C enclosure, your entire external path must stay under (125 − 70)/2 − 1.5 = 26 °C/W. That single inequality drives every copper and via decision that follows.
One ounce of copper (35 µm) has a sheet thermal conductance roughly 1,000× better in-plane than FR-4. Spreading heat laterally into a copper plane is almost always cheaper than trying to push it straight down through the laminate.
Copper pours as heat spreaders
A copper pour turns a point source into an area source. The larger the pour, the lower its spreading resistance and the more surface area it exposes to convection. But returns diminish fast: beyond roughly 600–1,000 mm² of 1 oz copper on a single layer, the far edges are barely warmer than ambient and add little. The practical move is to thicken (2 oz instead of 1 oz) and to use multiple layers tied together, rather than endlessly enlarging one plane.
- Keep the pour connected. Thermal-relief spokes on a power pad throttle heat flow; for thermal pads use a solid (flooded) connection, not four spokes.
- Mind soldering, not just heat. A large flooded ground pour acts as a heat sink during reflow and can cause tombstoning — balance thermal goals against manufacturability.
- Simulate before you trust intuition. Tools like Siemens Simcenter Flotherm, Cadence Celsius, or Ansys Icepak solve the 3-D conduction-convection problem and show you the real gradient instead of a hand-wave.
Thermal vias: stitching heat to the far side
A single thermal via is a thin copper tube — typically 0.3 mm drill, 25 µm plating — with a thermal resistance on the order of 60–100 °C/W. That sounds terrible, but vias work in parallel. An array of 25 vias under an exposed-pad QFN drops that to roughly 3–4 °C/W, moving heat from the top-layer pad down to an internal plane or the bottom-side copper where it can spread and convect.
Design rules of thumb: pitch vias at 1.0–1.2 mm, fill or tent them to prevent solder wicking, and always land them on a pad that genuinely connects to a plane on the other end. A via array that dumps heat into an isolated 10 mm × 10 mm bottom island accomplishes little — the heat has nowhere to go.
| Technique | Typical θ (°C/W) | Best for |
|---|---|---|
| Minimum pad, no pour | 60–100 | <0.25 W parts |
| Local copper pour (~400 mm²) | 30–45 | 0.5–1 W |
| Pour + 25-via array to inner plane | 12–20 | 1–3 W |
| Add clip-on / board heatsink | 5–12 | 3–10 W |
| Metal-core PCB (IMS) | 1–3 | LED / high-power |
Heatsinks and when the PCB is not enough
Once your power exceeds what copper and vias can convect — generally above 3–5 W per device in still air — you add a mechanical heatsink. The sink attaches through a thermal interface material (TIM); a mediocre pad at 3 °C·cm²/W over a 1 cm² contact contributes ~3 °C/W of θCS before the fins do any work, so TIM selection and mounting pressure matter as much as fin count. For sustained high density, an insulated metal substrate (IMS / metal-core PCB) replaces FR-4 with an aluminium base and a thin dielectric, collapsing the vertical resistance into the single-digit range.
Convection off a horizontal PCB in still air is roughly 5–10 W/m²·K. That ceiling is why, past a few watts, you must either force air across the board or add fin area — more copper alone cannot beat the convection limit.
A worked power budget
Suppose a buck regulator loses 2.2 W in its low-side MOSFET (θJC = 1.2 °C/W) inside a 55 °C enclosure, target TJ = 110 °C. Allowed external θ = (110 − 55)/2.2 − 1.2 = 23.8 °C/W. A 400 mm² top pour gives ~35 °C/W — fails. Add a 20-via stitch to a bottom pour and the parallel path drops to ~15 °C/W — passes with margin. This is the loop every layout engineer runs: dissipation → allowed θ → copper/via plan → verify in a thermal solver. Clean power delivery helps too; tight decoupling capacitor placement reduces transient losses, and a disciplined PCB stackup design gives your thermal vias a solid inner plane to dump into.
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For teams that would rather have the layout and thermal sign-off done for them, the design services at Avecas hardware engineering take a schematic through to a manufacturable, thermally-verified board.
Frequently asked questions
How many thermal vias do I need under a QFN?
Start with a grid matching the exposed pad at ~1.0 mm pitch — often 9 to 25 vias for a 5×5 mm pad. Verify against your allowed θ; if the single-via θ is ~80 °C/W, N vias give roughly 80/N in parallel, so 20 vias reach ~4 °C/W.
Does more copper always run cooler?
Only up to a point. Spreading resistance falls steeply at first, but beyond ~600–1,000 mm² of 1 oz copper the far edges approach ambient and add negligible cooling. Thickening copper or adding stitched layers beats enlarging one plane.
When should I switch to a metal-core PCB?
When per-device dissipation exceeds what vias and heatsinks can manage in your form factor — commonly high-power LEDs and motor drivers above ~5–10 W where you need single-digit °C/W vertically.
Can simulation replace a thermocouple test?
Simulation (Flotherm, Celsius, Icepak) catches design errors early and is essential, but material and assembly tolerances mean you still validate the first article with a thermal camera or thermocouples before volume.