In short: HDI (High-Density Interconnect) PCBs use laser-drilled microvias, thin dielectric build-up layers, and sub-100 µm features to fan out high pin-count, fine-pitch BGAs that a conventional through-hole board physically cannot escape.
When a package like a 0.4 mm-pitch mobile SoC or a 1 mm-pitch FPGA lands on your board, the real design problem is not the schematic — it is escape routing. There are simply not enough channels between the pads to get every net out using mechanically drilled vias. HDI technology exists to solve exactly this geometric crisis, and understanding when and how to reach for it is a core skill for any board designer.
What makes a board "HDI"
The IPC-2226 definition is practical: an HDI board carries higher wiring density than a standard board, enabled by microvias, fine lines, and thin dielectrics. Three features define it in practice:
- Microvias — laser-drilled holes, typically 75–150 µm diameter, connecting one layer to the next adjacent layer only. A standard mechanical via is 200–300 µm and spans the whole board.
- Build-up layers — thin dielectric (e.g. 60–100 µm RCC or prepreg) laminated sequentially onto a rigid core, one pair at a time.
- Fine line/space — down to 50/50 µm or tighter, versus 100/100 µm on a conventional board.
Why microvias matter: a 0.1 mm microvia with its small annular ring frees up routing channels between BGA pads. On a 0.5 mm-pitch BGA you cannot dog-bone every ball to a mechanical via and still route — the via-in-pad microvia removes that bottleneck entirely.
Stack-up notation: 1+N+1 and beyond
HDI stack-ups are described by how many build-up layers sit on each side of the core. A 1+N+1 stack has one microvia layer on top and bottom of an N-layer conventional core. A 2+N+2 adds a second build-up layer per side and introduces stacked or staggered microvias. "Any-layer HDI" (used in flagship smartphones) builds every layer as a microvia layer with copper-filled, stacked vias — the most capable and most expensive option.
Signal escaping a fine-pitch BGA (animated)
The animation below shows the core idea: a net leaves a BGA ball through a via-in-pad microvia, drops to the next layer, and routes out through the channel the microvia freed up.
When do you actually need HDI?
HDI is not free — expect a cost premium of roughly 20–50% over a comparable conventional board because of sequential lamination and laser drilling. Reach for it when the geometry forces your hand:
- BGA pitch ≤ 0.65 mm with a large ball array — mechanical vias cannot fit between pads.
- Layer-count reduction — a design that would need 12 conventional layers often collapses to 8 HDI layers, sometimes offsetting the cost.
- Signal integrity — short microvia stubs cut parasitic inductance for DDR4/5, PCIe Gen4/5, and USB4 nets.
- Miniaturization — wearables, phones, medical implants where board area is the hard constraint.
Rule of thumb: if your escape analysis shows more nets than available routing channels on a 0.5 mm BGA, you need HDI. Tools like Siemens Xpedition and Cadence Allegro X can run automatic BGA fan-out and flag the shortfall before you commit a stack-up.
Comparing the technologies
| Attribute | Conventional PCB | HDI PCB |
|---|---|---|
| Via type | Mechanical, through-hole | Laser microvia (+ buried/through) |
| Via diameter | 200–300 µm | 75–150 µm |
| Min line/space | 100/100 µm | 50/50 µm or finer |
| Min BGA pitch | ~0.8 mm | 0.4 mm and below |
| Lamination | Single-press | Sequential build-up |
| Relative cost | 1× | 1.2–1.5× |
Design and manufacturing gotchas
A few traps bite newcomers. Microvias should be copper-filled and capped if you stack them or place them in pads, otherwise solder wicks into the via during reflow and starves the joint. Keep microvia aspect ratios conservative (depth-to-diameter around 0.75:1) for reliable plating. And always confirm your fabricator's exact capability — a stack-up that assumes 2+N+2 any-layer from one shop may be a non-starter at another. Your PCB stack-up design must be co-developed with the fab, not thrown over the wall. For high-speed nets, model the microvia transitions in your signal integrity flow rather than assuming they are ideal.
Teams building production-grade HDI hardware often pair their in-house layout with specialist semiconductor and board design services to de-risk the first sequential-lamination spin.
Want to design HDI boards hands-on — from stack-up planning to microvia DFM — with real Cadence and Siemens tool flows? Explore CourseTron's PCB and VLSI tracks on our courses page.
Frequently asked questions
What is the difference between a microvia and a blind via?
A blind via connects an outer layer to one or more inner layers and may be mechanically drilled. A microvia is a specific, laser-drilled blind via that spans only one dielectric layer, typically under 150 µm. All microvias are blind, but not all blind vias are microvias.
Can I put a via directly in a BGA pad?
Yes, with HDI. Via-in-pad is standard for fine-pitch BGAs, but the microvia must be copper-filled and planarized so solder does not drain into the hole during assembly. This is why filled-and-capped microvia processes exist.
Does HDI always mean a more expensive board?
Per square inch, yes. But HDI can reduce total layer count, shrink board area, and improve yield on dense parts, so the finished product cost is sometimes comparable to a bloated conventional design that tries to avoid HDI.
Which EDA tools support HDI layout?
Siemens Xpedition and Cadence Allegro X / OrCAD X both offer microvia-aware stack-up editors, BGA auto-fanout, and HDI DFM checks. Altium Designer also handles back-drilling and microvia definitions well for mainstream designs.