Wafer sort (probe test)

In short: Wafer sort is the electrical test of every die while it is still part of the silicon wafer, before any dicing or packaging. A probe card lands fine needles on each die's bond pads, an ATE runs test patterns, and the result is recorded as a pass/fail bin so that only good dies move on to assembly.

What is wafer sort?

Wafer sort — also called probe test, wafer probe, or sort — is the first point at which a freshly fabricated chip is tested electrically. After hundreds of lithography, etch, implant and deposition steps, a 300 mm wafer may hold thousands of identical dies. Fabrication is never perfect: particle defects, shorts, opens and parametric drift mean some dies simply do not work. Wafer sort finds those failures before the factory spends money cutting, bonding and packaging each die.

The economics are the whole point. Packaging and final test add real cost per unit, so screening bad dies at the wafer stage avoids packaging silicon that was never going to ship. Wafer sort also feeds the yield data that process and design teams use to diagnose what is going wrong on the line.

The probe card: where silicon meets the tester

The star of wafer sort is the probe card. It is a precision interface board carrying dozens to many thousands of conductive needles (or spring contacts) arranged to exactly match the bond-pad or micro-bump layout of the die under test. When the prober steps the wafer underneath, the card is lowered until its tips make temperature-stable, low-resistance contact with the pads — an action called touchdown.

Common probe-card technologies include:

• Cantilever cards — angled tungsten needles, inexpensive, good for low pin counts and analog parts.
• Vertical / buckling-beam cards — dense vertical probes that buckle under pressure, used for high pin-count logic.
• MEMS / spring-probe cards — micro-fabricated contacts that enable massively parallel testing and fine-pitch bumps.

Two parameters make or break a probe card: overtravel (how far the stage pushes past first contact to guarantee every pad is hit) and scrub (the controlled lateral skid of each tip that breaks through the pad's native oxide for a clean connection). Too little and you get opens; too much and you damage the pad.

How a wafer sort run works, step by step

A sort run is a tight loop coordinated by the prober (the mechanical handler that holds and moves the wafer) and the ATE (automatic test equipment running the test program):

1. Load and align. The wafer is loaded onto a vacuum chuck; a camera and theta stage align the die grid to the probe tips.
2. Index and touchdown. The stage steps to the first die (or site group) and raises to the programmed overtravel so all needles contact the pads.
3. Test. The ATE applies power, runs continuity/open-short checks, DC parametric tests, functional and scan (structural) patterns, and often at-speed tests.
4. Bin. The pass/fail outcome, with a numeric bin code, is written to the wafer map.
5. Step. The prober indexes to the next die and repeats until the wafer is finished.
6. Ink or map. Bad dies are recorded in a digital wafer map (modern flow) or historically marked with an ink dot so assembly skips them.

Modern probers test many dies in parallel — 32, 64 or more sites at once — to keep throughput high, which is exactly why massively parallel probe cards matter.

Binning: turning results into decisions

Binning is how wafer sort converts raw measurements into an actionable verdict. Each die is assigned a bin number: bin 1 is typically "all good," while a range of higher bins encode specific failure modes — continuity fail, leakage, scan fail, speed fail, and so on. This is far more useful than a plain pass/fail flag:

• Soft bins describe the test category that caught the die; hard bins group them into the handful of physical dispositions used downstream.
• Speed binning sorts good dies by the maximum frequency they can run, which is how the same silicon becomes different product SKUs.
• The resulting wafer bin map is a yield fingerprint — cluster patterns point to particle defects, edge rings point to process non-uniformity, and systematic stripes point to reticle or stepper issues.

Only dies in passing bins are released to dicing and assembly; everything else is discarded, saving the cost of packaging doomed silicon.

Wafer sort vs. final test

Wafer sort is not the last test a chip sees. Final test happens after packaging, on the finished unit, and can exercise the part at full speed and over the complete temperature range. Wafer sort is constrained by probe-card inductance and the difficulty of delivering clean power through needles, so it focuses on catching gross defects cheaply and on gathering yield data. Together the two stages form the outgoing-quality screen: sort weeds out the dead silicon early, final test certifies the survivors that got packaged.

wafer sort — FAQ

Why test dies before packaging instead of after?

Because packaging, assembly and final test cost real money per unit. Wafer sort screens out defective dies at the cheapest possible stage so the factory only packages silicon that has already proven it can work.

What is the difference between wafer sort and a probe card?

Wafer sort is the whole test step. The probe card is the specific hardware interface — the board full of needles — that physically connects the ATE to each die's pads during that step.

What does "binning" mean in wafer sort?

Binning assigns every die a numeric code recording whether it passed and, if it failed, which test caught it. These bins build the wafer map and also let good dies be graded by performance into different products.

Can wafer sort replace final test?

No. Sort is limited by the electrical quality of probe contact and cannot fully exercise the part at speed and temperature, so a separate final test is still run on the packaged device.

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