In short: Impedance matching in PCB means designing a trace so its characteristic impedance equals the impedance the driver and receiver expect, so a fast signal travels down the line without reflecting back. You control it through trace width, dielectric thickness and the dielectric constant of the laminate, and you enforce it with termination resistors at the ends of the line.
Impedance matching in PCB is the practice of making a signal path present a single, consistent impedance from the moment the driver launches an edge to the moment the receiver samples it. A copper trace over a reference plane is not a simple wire at high speed — it behaves as a transmission line with a defined characteristic impedance (Z₀). When the source impedance, the trace impedance and the load impedance all agree, energy flows forward cleanly. When they disagree, part of the signal bounces back as a reflection, corrupting the waveform.
The reason this matters is the speed of the edge, not the clock frequency. The moment a signal's rise time is comparable to the time it takes to travel the trace, the trace must be treated as a controlled-impedance line. A rough rule: if the physical trace length exceeds about one-sixth of the rising edge's electrical length, reflections become significant and matching is mandatory.
Characteristic impedance is set entirely by the trace geometry and the surrounding dielectric, not by the trace length. For a lossless line it is Z₀ = √(L/C), where L and C are the inductance and capacitance per unit length. In practical terms, on a PCB, Z₀ depends on four things:
The two dominant geometries are microstrip (a trace on an outer layer over one plane) and stripline (a trace buried between two planes). Microstrip is faster and easier to route; stripline is better shielded and more immune to crosstalk. Designers rarely compute Z₀ by hand — a field solver or the fab's stackup calculator returns the exact width for a target impedance. Common targets are 50Ω single-ended and 100Ω or 90Ω differential.
When a signal meets a change in impedance, a fraction of it reflects. The reflection coefficient Γ = (Z_L − Z₀) / (Z_L + Z₀) tells you how much. An open end (Z_L = ∞) reflects the full wave positively; a short (Z_L = 0) reflects it inverted; a perfect match (Z_L = Z₀) gives Γ = 0 and no reflection at all.
These reflections do real damage at the receiver:
The animation below shows a forward edge launched into a mismatched line, hitting an unterminated open end and returning as a reflected wave — the mechanism behind ringing.
Termination absorbs the signal's energy so nothing reflects. The common schemes are:
Beyond discrete resistors, good matching depends on keeping the reference plane continuous under the trace, avoiding splits and stubs, and keeping vias and connectors — which are themselves impedance discontinuities — short and well referenced.
Real projects and industry tool flows, with certification.
Explore CourseTron Courses →50Ω is a practical compromise. For coaxial lines, minimum loss sits near 77Ω and maximum power handling near 30Ω, and 50Ω balances the two while being easy to realize with manufacturable trace widths on common stackups. Most driver and connector ecosystems standardized around it.
Usually not. What matters is edge rate, not clock frequency. A slow signal with a very fast edge can still require matching, while a modest-edge signal on a short trace does not. Compare the trace length to the critical length derived from the rise time to decide.
Microstrip runs on an outer layer over a single reference plane — faster and easy to probe, but more exposed to radiation and crosstalk. Stripline is buried between two planes — better shielded and slightly slower because it is fully surrounded by dielectric.
Fabricators use a Time-Domain Reflectometer (TDR) on a dedicated coupon built into the panel. The TDR launches a fast edge and reads the reflected profile to confirm the trace impedance is within tolerance, typically ±10%.
Related: signal integrity in PCB · Glossary · all courses.