In short: Thermal reliefs trade a little electrical/thermal conductance for solderability on pads tied to copper pours, while teardrops add fillet copper at pad-to-trace and via junctions to resist drill breakout and mechanical cracking — both are manufacturing-reliability features, not cosmetic ones.
Two of the most misunderstood features in a PCB layout are thermal reliefs and teardrops. Neither carries signal information, yet omitting or misconfiguring them is a classic cause of cold joints, lifted pads, and fractured barrels in the field. This article explains the physics behind each, gives concrete geometry numbers, and shows where they fit in the flow you already learn in our PCB manufacturing process walkthrough.
What a thermal relief actually solves
When a through-hole pin or a surface pad connects directly to a large copper plane (a ground or power pour), that plane behaves as a giant heat sink. During hand soldering or wave soldering the pour wicks heat away from the joint faster than a 25–40 W iron or a 255 °C solder wave can deliver it. The result is a cold, dull, high-resistance joint — or a joint that never fully reflows at all.
A thermal relief breaks the direct copper connection into spokes (usually four) with gaps between them. The pad is still electrically bonded to the plane, but the thin spokes throttle heat conduction long enough for the joint to reach reflow temperature. A typical spoke for a 1.0 mm pad is 0.25–0.4 mm wide with a 0.25 mm air gap; the spoke angle is usually 45° or 90°.
Rule of thumb: a 4-spoke relief reduces conductive heat loss into the pour by roughly 60–75% versus a solid connection, which is typically the difference between a 2-second and a 6-second hand-solder dwell on a ground pin.
The cost side: current and thermal performance
Spokes are not free. Because they constrict the copper cross-section, they raise the effective resistance and inductance of the pad-to-plane path and reduce how much current the joint can carry before self-heating. For a power or high-current ground pin — a buck converter's ground pad, a connector carrying 5–10 A, or a BGA power ball field — a thermal relief can become the dominant series resistance.
The standard compromise: use reliefs on signal and low-current pins for manufacturability, and use solid (direct) connections on high-current nets, compensating with preheat during assembly. Many designs widen spokes to 0.5 mm or use only two spokes on the high-current side. Current capacity is governed by IPC-2152; a 0.25 mm × 0.035 mm (1 oz) spoke carries only a few amps before a 10 °C rise.
| Connection style | Solderability | Current / R | Typical use |
|---|---|---|---|
| Solid / direct | Poor (heat sink) | Best (low R) | Power rails, high-I ground |
| 4-spoke relief | Good | Moderate | Signal/control pins on a pour |
| 2-spoke relief | Good | Better than 4 | Medium-current compromise |
| Thermal + wide spokes | Fair | Good | Connectors, 3–8 A pins |
Teardrops: mechanical and drill-registration insurance
A teardrop is a tapered copper fillet added where a thinner trace meets a wider pad or via annular ring. Visually it looks like a water drop merging the trace into the pad. Its job is to defend the junction against three failure modes:
- Drill breakout. Drill registration tolerance is typically ±50–75 µm. If the drill drifts toward the trace side, a sharp trace-to-pad transition can lose its annular ring and expose the barrel; a teardrop adds copper margin exactly there.
- Mechanical stress cracking. A 90° trace-to-pad corner is a stress concentrator. Thermal cycling (CTE mismatch between copper and FR-4), vibration, and flex repeatedly load that corner. The teardrop's gradual taper spreads the stress and raises fatigue life.
- Acid traps / etch defects. Smooth fillets avoid acute inside angles where etchant can pool and over-etch the neck of the trace.
On flex and rigid-flex boards teardrops are effectively mandatory — the repeated bending at pad junctions is where barrels and traces crack first. Siemens Xpedition, Cadence Allegro, and Altium all generate teardrops as an automated DRC-aware post-route step.
Where they sit in the design flow
Both features are applied after routing is final and before Gerber/ODB++ export, because they depend on finished geometry and must respect clearance DRC. The usual order is: route → pour copper planes → generate thermal reliefs on plane-connected pads → generate teardrops on trace/pad/via junctions → run DRC → re-verify clearances. If you add teardrops first and then edit a trace, you must regenerate — stale teardrops that overlap a neighboring net are a real DRC trap.
For advanced nodes and dense HDI, the same reliability thinking extends into via design and IC packaging; if you are moving toward design-for-manufacturing at scale, our partners at Avecas design services handle production PCB and package DFM work hands-on.
Common mistakes we see from students
- Putting 4-spoke reliefs on a 10 A motor-driver ground and then wondering why the FET runs hot — that pad needed a solid tie plus assembly preheat.
- Disabling teardrops to "clean up" the layout, then seeing barrel cracks after thermal-shock testing.
- Setting the relief air gap below the fab's minimum (often 0.2 mm), causing the spoke to merge back into the pour.
- Forgetting to regenerate teardrops after an ECO, leaving copper slivers that fail impedance or clearance checks.
Want to go from schematic to a manufacturable, reliability-aware board? Our PCB design track covers thermal management, DFM, and signal integrity end-to-end — browse CourseTron courses and start with the fundamentals.
FAQ
Should every pad on a copper pour use a thermal relief?
No. Use reliefs on signal and low-current pins where solderability matters most, and use solid connections on high-current power and ground pins where series resistance and thermal performance dominate. Decide per net, not globally.
Do teardrops affect signal integrity?
Mildly. They add a small amount of copper and change the local impedance at the junction, which is negligible for most digital and low-speed analog nets. On controlled-impedance and multi-gigabit lines, verify in your field solver; most tools let you exclude specific nets from teardropping.
What spoke width and gap should I start with?
A safe default for a 1.0 mm pad is four spokes at 0.3 mm width with a 0.25 mm air gap at 45°, then confirm against your fabricator's capability sheet and IPC-2152 for the current you expect.
Can the fab add teardrops for me?
Some fabricators will, but it is far safer to generate and verify them in your EDA tool (Allegro, Xpedition, Altium) so they are DRC-checked against your actual clearances rather than guessed from Gerbers.