Analog

Poles and zeros in analog design

By CourseTron Team ·  7 min read ·  Updated Oct 2026 💬 𝕏 in f
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    In short: A pole is a frequency where a circuit's gain starts rolling off at -20 dB/decade and lags the phase by up to 90°, while a zero does the reverse — mastering where they sit on the s-plane is how you predict bandwidth, stability, and whether your amplifier will oscillate.

    Every analog designer eventually hits the same wall: the DC gain looks perfect in simulation, but the moment you close the loop the output rings, peaks, or breaks into full oscillation. Nine times out of ten, the culprit is a pole or zero sitting somewhere you did not expect. Understanding poles and zeros is not academic trivia — it is the single most reused mental model in op-amp design, filter synthesis, PLL loop filters, and LDO stability. This article builds that intuition from the transfer function up to a practical Bode reading you can do in your head.

    What a transfer function actually encodes

    Any linear circuit has a transfer function H(s) — the ratio of output to input in the Laplace domain, where s = σ + jω. Written in factored form, it looks like a ratio of products:

    H(s) = K · (s − z₁)(s − z₂)… / (s − p₁)(s − p₂)…

    The roots of the numerator are the zeros (frequencies where the output goes to zero) and the roots of the denominator are the poles (frequencies where the function blows up). For a real physical circuit these come straight from the R and C values. A single RC low-pass, for instance, gives H(s) = 1/(1 + sRC), which has one pole at ωp = 1/RC. If R = 10 kΩ and C = 1.6 nF, that pole lands at roughly 10 krad/s, or about 1.6 kHz.

    A pole contributes −20 dB/decade of gain slope and up to −90° of phase shift; a left-half-plane zero contributes +20 dB/decade and up to +90°. The phase transition is spread across two decades — one decade either side of the corner.

    Reading the Bode plot: magnitude and phase

    The Bode plot splits H(jω) into a magnitude curve (dB vs log frequency) and a phase curve (degrees vs log frequency). The beauty is that for widely spaced poles and zeros you can sketch both by hand using straight-line asymptotes:

    • Start at the DC gain (e.g. 20·log₁₀(K)).
    • At each pole, bend the magnitude slope down by 20 dB/decade.
    • At each zero, bend it up by 20 dB/decade.
    • At the corner frequency the actual curve sits 3 dB below (pole) or above (zero) the asymptote.
    Bode magnitude: two poles dB log ω p₁ p₂ 0 dB/dec −20 dB/dec −40 dB/dec CourseTron · coursetron.com
    Straight-line magnitude asymptotes: each pole adds another −20 dB/decade of roll-off.

    The dominant pole and why we love it

    When one pole sits at a much lower frequency than all the others — typically at least a decade below — it is called the dominant pole. It single-handedly sets the −3 dB bandwidth and, because the next pole is far away, it supplies a full 90° of phase lag long before any other pole contributes. This is the whole premise of dominant-pole (Miller) compensation: deliberately push one pole low so the loop gain crosses unity while only that pole is active, guaranteeing phase margin.

    Consider a two-stage op-amp with an open-loop DC gain of 80 dB (×10,000), a dominant pole at 100 Hz, and a second pole at 2 MHz. The gain falls at −20 dB/decade from 100 Hz. The unity-gain frequency (fu) lands where the gain hits 0 dB: 100 Hz × 10,000 = 1 MHz. Since 1 MHz is still below the 2 MHz second pole, the second pole has barely begun to act, so phase margin stays comfortable — roughly 63°. If instead the second pole were at 500 kHz, it would be fully active at crossover, dragging phase margin toward zero and inviting oscillation.

    ElementMag slope changeMax phase shiftTypical source
    LHP pole−20 dB/dec−90°Output R·C load
    LHP zero+20 dB/dec+90°ESR of a capacitor
    RHP zero+20 dB/dec−90°Miller feedforward
    Complex pole pair−40 dB/dec−180°LC / underdamped

    Phase margin = 180° + ∠H(jfu). A design target of 45° is the bare minimum; 60–70° gives a clean step response with minimal overshoot. Below 45°, expect peaking and ringing.

    Worked example: dominant-pole op-amp 80 dB 0 dB 101001k10k100k1M10M Hz p₁ = 100 Hz fᵤ = 1 MHz p₂ = 2 MHz −20 dB/dec fᵤ = 100 Hz × 10,000 = 1 MHz PM = 180° − 90° − atan(1/2) ≈ 63° CourseTron · coursetron.com
    Open-loop gain of 80 dB with a dominant pole at 100 Hz crosses 0 dB at 1 MHz, below the 2 MHz second pole, giving about 63° of phase margin.

    Watch out for the right-half-plane zero

    Not all zeros are friendly. A zero in the right half of the s-plane adds gain (+20 dB/decade, pushing crossover higher) but subtracts phase (−90°, just like a pole). It is the worst of both worlds for stability. RHP zeros appear naturally in Miller-compensated two-stage amplifiers (from the feedforward path through the compensation capacitor) and in boost/buck-boost switching converters. The classic fix is a nulling resistor in series with the Miller cap, which pushes the RHP zero out to infinity or flips it into the left half-plane. This exact trade-off is explored in our companion piece on Miller compensation, and it sits right next to the broader topic of op-amp stability and phase margin.

    Animating a pole: charge following the signal

    RC low-pass: charge lags the input Vin R C Vout The capacitor lags: that lag is the pole. CourseTron · coursetron.com
    The pole in physical terms: charge takes time to fill C through R, so Vout lags the input — exactly the −90° phase the pole predicts.

    Tools and workflow in practice

    In the real flow you rarely factor polynomials by hand past second order. A Cadence Spectre or Synopsys HSPICE .ac analysis gives you the full Bode plot, and the .pz (pole-zero) analysis extracts the exact pole and zero locations from the linearized small-signal model at the operating point. Siemens Eldo and Cadence's Virtuoso stability (stb) analysis then report phase margin and gain margin directly. The discipline is always the same: run the pole-zero extraction, identify the dominant pole, confirm the next pole/zero is at least 2–3× the unity-gain frequency away, and check that no RHP zero has crept below crossover. If you want hands-on practice building these flows, ChipXpert's analog design training runs students through op-amp compensation on real PDKs.

    Ready to design amplifiers that stay stable across PVT corners? The CourseTron Analog & Mixed-Signal track walks you from first-pole intuition to full phase-margin budgeting in Spectre.

    Frequently asked questions

    What is the difference between a pole and a zero?

    A pole is a frequency where the transfer function's denominator goes to zero, causing gain to roll off at −20 dB/decade and phase to lag. A zero is a root of the numerator, causing gain to rise at +20 dB/decade; a left-half-plane zero leads phase while a right-half-plane zero lags it.

    Why is the dominant pole so important for stability?

    The dominant pole sets the −3 dB bandwidth and provides phase lag early, so that when loop gain falls to unity only that single pole is active. This keeps phase margin high and prevents the 180° total lag that would turn feedback into oscillation.

    How do I estimate phase margin from a Bode plot?

    Find the unity-gain (0 dB) crossover frequency on the magnitude plot, read the phase at that frequency, and add 180°. A result of 45° is marginal; 60° or more gives a well-damped response.

    What makes a right-half-plane zero dangerous?

    An RHP zero raises gain like a normal zero but lags phase like a pole. This combination pushes the crossover frequency higher while simultaneously eroding phase margin, so it degrades stability in both directions and usually needs a nulling resistor to tame it.

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