In short: A trigger pulse below 1/3 Vcc sets the 555, and the timing capacitor then charges through R until it reaches 2/3 Vcc, which resets the chip; solving the exponential gives T = RC·ln 3 ≈ 1.1RC.
What a monostable actually does
A monostable (one-shot) has one stable state: output low. A brief trigger kicks it into a quasi-stable high state for a fixed time, after which it falls back by itself. The 555 is the classic way to build one with two passive parts: a resistor R and a capacitor C. Use cases include switch debouncing, missing-pulse detection, power-on-reset stretchers, and pulse-width generators for LED or relay drive.
If you want the free-running cousin, read our 555 astable multivibrator article; the same two comparators do the work, only the wiring differs.
Inside the 555: the parts that matter
Three equal resistors (5 kΩ each in the original bipolar part, hence the name) form a divider that sets two references: 2/3 Vcc for the upper comparator and 1/3 Vcc for the lower one. The upper comparator watches the THRESHOLD pin (6); the lower one watches the TRIGGER pin (2). Their outputs drive an SR flip-flop. The flip-flop output drives the output stage and also an NPN discharge transistor on pin 7.
- Trigger comparator: when pin 2 falls below 1/3 Vcc, it sets the flip-flop. Output goes high and the discharge transistor turns off.
- Threshold comparator: when pin 6 rises above 2/3 Vcc, it resets the flip-flop. Output goes low and the discharge transistor turns on, dumping the capacitor.
- Reset pin (4): overrides everything; tie it high if unused.
Step-by-step operation
In the idle state the flip-flop is reset, so the discharge transistor is on and holds C near 0 V. The output sits low. Pin 2 is held above 1/3 Vcc by a pull-up resistor.
- A falling edge pulls pin 2 below 1/3 Vcc. The flip-flop sets, OUT goes high, and the discharge transistor releases the capacitor.
- C now charges from Vcc through R. The pin 6 voltage rises exponentially toward Vcc.
- When it crosses 2/3 Vcc the threshold comparator trips, the flip-flop resets, OUT drops, and the transistor discharges C within microseconds.
Key fact: the pulse width depends only on R and C, not on Vcc, because both thresholds are fixed fractions of Vcc and the charging target is also Vcc. The supply cancels out of the ratio.
Deriving T = 1.1RC
The capacitor starts at 0 V and charges toward Vcc through R, so
Vc(t) = Vcc · (1 − e^(−t/RC))The pulse ends when Vc reaches 2/3 Vcc:
(2/3)·Vcc = Vcc · (1 − e^(−T/RC))
e^(−T/RC) = 1/3
T = RC · ln(3) = 1.0986 · RC ≈ 1.1 · RCNotice that Vcc cancels entirely. Also note that the 1/3 trigger level plays no part in the timing formula; it only decides when the pulse starts. The capacitor begins at 0 V, not at 1/3 Vcc, which is a common point of confusion with the astable, where the capacitor swings between 1/3 and 2/3 Vcc.
Worked numbers
| R | C | T = 1.1RC |
|---|---|---|
| 10 kΩ | 0.1 µF | 1.1 ms |
| 100 kΩ | 10 µF | 1.1 s |
| 1 MΩ | 100 µF | 110 s (leakage will spoil accuracy) |
Practical limits: keep R between roughly 1 kΩ and 1 MΩ. Below that, the output and discharge currents grow; above that, the threshold input bias current (about 0.1 µA on bipolar parts) steals charge and stretches the pulse. For long delays use a low-leakage film or C0G capacitor, not an aluminium electrolytic with ±20% tolerance and leakage in the µA range. Timing accuracy of the chip itself is about 1%, so the capacitor tolerance usually dominates.
Trigger and threshold behaviour: the interview traps
The most common failure is a trigger input that stays low longer than T. Because the lower comparator keeps the flip-flop set while the upper one is also trying to reset it, the bipolar 555 output stays high until the trigger returns above 1/3 Vcc, so the pulse is longer than calculated. The cure is a differentiator: a small series capacitor (say 1 nF) and a pull-up of 10 kΩ to Vcc create a short negative spike from a long input pulse.
Key fact: while the output is high the 555 ignores new triggers (non-retriggerable). A trigger during the pulse changes nothing, because the flip-flop is already set. If you need a retriggerable one-shot, use a 74HC123 or add a transistor that discharges C on each trigger.
Other points worth remembering:
- Control voltage (pin 5): it overrides the 2/3 Vcc reference. Applying Vctl changes the width to T = RC·ln(Vcc/(Vcc−Vctl)), which makes pulse-position modulation possible. Otherwise decouple pin 5 with 10 nF to ground to reject supply noise.
- Trigger overshoot: a trigger edge that drops below ground can forward-bias internal junctions. Clamp it with a Schottky diode.
- Supply current spike: the bipolar 555 draws a brief crowbar current at output transitions, so place a 100 nF bypass close to pins 8 and 1. CMOS parts such as the TLC555 avoid this and allow a lower supply.
Simulation and design practice
Verify the one-shot in SPICE before building it: Cadence PSpice, Siemens EDA's Xpedition AMS, or a free LTspice model with a transient run of at least 5T. Sweep Vcc from 5 V to 15 V to confirm the width stays within about 1%. In an ASIC or mixed-signal chip, the same function is usually built as a digital counter off a clock, which scales better than a 1.1RC analogue delay. If you design analogue blocks like this professionally, the team at Avecas does mixed-signal design services, and ChipXpert runs hands-on training. Next, continue with RC time constant and charging.
Key fact: ln 3 = 1.0986, so the 1.1 factor is a rounded constant, not a magic number. Interviewers often ask for the derivation, not the result.
Want guided labs on timers, comparators and mixed-signal blocks? Explore the analog track in our CourseTron courses.
FAQ
Why is the pulse width 1.1RC and not RC?
One time constant takes the capacitor to 63.2% of Vcc, but the threshold is 66.7%. Solving for 2/3 gives ln 3 = 1.0986 time constants.
Does the supply voltage change the pulse width?
No. Both thresholds and the charging target scale with Vcc, so it cancels in the equation. Only the control-pin voltage or capacitor leakage shifts the width.
What happens if the trigger stays low longer than the pulse?
On the bipolar 555 the output stays high until the trigger rises above 1/3 Vcc, so the pulse is stretched. Use an RC differentiator on the trigger input.
Can a 555 monostable be retriggered?
Not in its basic form. Triggers during the timing interval are ignored. Add a discharge transistor or use a dedicated retriggerable one-shot IC.