Ring Counter

In short: A ring counter circulates a single 1 through N flip-flops for N states, while a Johnson counter feeds back the inverted last output to get 2N states from the same N flip-flops, trading decode simplicity for density.

Why shift-register counters exist at all

A binary counter needs only log2(N) flip-flops, so why would anyone spend N flip-flops to count N states? Because of what happens after the counter: decoding. A 4-bit binary counter driving ten sequential control signals needs ten AND gates with up to four inputs each, and every transition can produce brief decoding glitches. A shift-register counter hands you the control signals directly from flip-flop outputs. If you are building a sequencer, a stepper-motor driver or a multiplexed display scanner, the extra flops are often cheaper than the decode logic and the timing risk. For the wider family of counters, see our overview of counters in digital electronics.

The ring counter: a circulating one-hot token

A ring counter is a shift register whose last output feeds the first input. Initialise it to 1000 and every clock edge rotates the pattern: 1000, 0100, 0010, 0001, then back to 1000. Only one flip-flop is high at any time, which is the definition of a one-hot code. An N-bit ring counter therefore has exactly N valid states and a modulus of N.

Key fact: a ring counter wastes states. N flip-flops can hold 2^N patterns, yet only N are legal. A 4-bit ring uses 4 of 16 states, and the other 12 are illegal.

Watch the token move

The Johnson counter: twisted ring, double the states

A Johnson (twisted-ring, or Möbius) counter makes one change: the inverted output of the last flop, Q3', feeds the first input. Starting from 0000, ones fill in from the left, then zeros push them out: 0000, 1000, 1100, 1110, 1111, 0111, 0011, 0001, back to 0000. That is 2N states, so a 4-bit Johnson counter has modulus 8 and a 5-bit one has modulus 10, which makes it a natural decade sequencer.

Ring vs Johnson: the numbers

To produce a mod-12 sequence you need 12 flops as a ring, 6 as a Johnson counter, or 4 as a binary counter plus decode. The Johnson option halves the flop count of the ring and keeps decoding trivial.

Decoding a Johnson counter

Any Johnson state is identified by just two adjacent bits, where the pattern changes from 0 to 1 or 1 to 0. In the 4-bit sequence, Q1·Q2' is true only in 1100, and Q0'·Q3' is true only in 0000. So every output costs one 2-input gate regardless of counter width, whereas a binary counter's decode grows with width. Because only one bit changes per clock, the decoded outputs are also glitch-free, a property shared with Gray code (see our note on Gray code and hazards).

Key fact: single-bit transitions mean no decoding race. That is why Johnson counters appear in clock-domain pointers and stepper-motor sequencers where a glitch would cause a missed step.

Self-starting and lock-up: the real interview question

Power-up leaves flip-flops in random states. For a ring counter, a pattern such as 1010 simply rotates forever as 0101 and never reaches 1000, so the counter is stuck in an illegal cycle. Johnson counters have the same weakness: a 4-bit one has 16 patterns, 8 legal, and the other 8 form a second loop (for example 0100, 1010, 1101, 0110, 1011, 0101, 0010, 1001).

There are two standard cures. The first is a synchronous preset or reset to a known legal state, which costs nothing in functionality but needs a reset tree. The second is to make the feedback self-correcting. For a ring counter, feed back NOR of Q0 to Q2 into D0 so that an all-zero low section injects a 1. For a Johnson counter, modify the feedback so that illegal patterns fall into the main cycle. Self-correcting logic adds a gate, a little delay on the critical feedback path, and verification effort.

// 4-bit Johnson counter with synchronous reset
module johnson4 (input clk, rst_n, output reg [3:0] q);
  always @(posedge clk)
    if (!rst_n) q <= 4'b0000;
    else        q <= {q[2:0], ~q[3]};
endmodule

Design trade-offs on real silicon and FPGAs

• Area and power: a ring counter toggles two flops per cycle regardless of width, so its dynamic power is low, but a wide ring costs many flops. Johnson toggles one flop per cycle, the lowest switching activity of any counter family.
• Timing: both are shift registers, so the only logic between flops is zero or one inverter. They close timing at very high clock frequencies in Synopsys Design Compiler or Cadence Genus, limited mostly by clock skew and hold fixing rather than logic depth.
• Hold violations: flop-to-flop paths with no logic are the classic hold-fix target. Expect the physical-design tools (Innovus, IC Compiler II) to insert delay buffers after clock tree synthesis.
• FPGAs: flip-flops are plentiful, so a one-hot ring is a common choice. Synthesis tools from AMD Xilinx and Intel often re-encode large FSMs to one-hot for exactly this reason, because it shortens the next-state logic.
• Verification: simulate the illegal states too. Questa or VCS testbenches should force random initial values and assert that the counter recovers within N clocks. Formal tools can prove it exhaustively.

When to choose which

Choose a ring counter when you need N mutually exclusive enable pulses with zero decode logic, such as a round-robin arbiter token or a multiplexed seven-segment scan. Choose a Johnson counter when you need up to twice as many phases from the same flop budget, or when glitch-free decoded outputs matter, as in a divide-by-2N clock generator that produces a 50% duty cycle automatically. Choose a binary counter when states are many and decode is rare. If you want to practise these circuits in a guided way, our shift register guide is the best prerequisite, and design teams that need counters and sequencers signed off in silicon can talk to Avecas VLSI design services.

Want to build, simulate and debug counters and FSMs hands-on? Explore the Digital Electronics track in the CourseTron courses and get interview-ready.

FAQ

How many states does a 4-bit ring counter have compared with a Johnson counter?

A 4-bit ring counter has 4 valid states, while a 4-bit Johnson counter has 8, because the inverted feedback lets the register fill with ones and then empty again.

Why is a ring counter called one-hot?

Exactly one flip-flop output is 1 in every valid state, so each state is identified by which single bit is high, with no decoding needed.

What happens if a ring counter powers up in an illegal state?

It stays in an invalid cycle such as 1010 and 0101 forever. You fix it with a reset or preset to a legal state, or with self-correcting feedback logic.

Why are Johnson counter outputs glitch-free?

Only one bit changes per clock edge, so the 2-input decoding gates never see two inputs switching at once, which removes decoding races.