In short: A Zener diode held in reverse breakdown clamps its cathode voltage to VZ, and a correctly sized series resistor steers excess current away from the load, giving a cheap shunt regulator whose accuracy is bounded by load range, line range, and the diode's power rating.
The Zener shunt regulator is the first regulator every analog engineer meets, and it is still asked about in interviews because it exposes the three ideas that underlie all linear regulation: a stable reference, a series element that absorbs the difference, and a power budget that must not be exceeded. Let us build the circuit from first principles with real numbers.
Reverse breakdown: why the voltage stays put
A normal diode blocks reverse current. A Zener is doped so that at a precise reverse voltage, VZ, the junction enters a controlled breakdown, either the Zener effect (quantum tunnelling, dominant below ~5 V) or avalanche multiplication (above ~6 V). In this region the I–V curve is nearly vertical: a large change in current produces only a small change in voltage. That small change is captured by the dynamic resistance rZ (datasheets quote it, e.g. 10 Ω for a 1N4733A at 5.6 V). The device behaves like a battery of value VZ in series with rZ, and that model is what you actually compute with.
Devices around 5.5–6 V have the lowest rZ and the flattest temperature coefficient, because the negative tempco of the Zener effect cancels the positive tempco of avalanche. That is why precision references such as the LM399 and buried-Zener parts sit near 6.3–7 V.
Sizing the series resistor
The whole design reduces to one equation at the node: Is = IZ + IL, where Is = (Vin − VZ) / Rs. The resistor must satisfy two opposite constraints simultaneously:
- Worst case for the Zener (minimum current): lowest Vin and highest IL. The diode must still carry at least its knee current IZmin (often 1–5 mA) or it falls out of breakdown and regulation collapses.
- Worst case for power (maximum current): highest Vin and no load (IL = 0). Now almost all of Is flows through the diode, and PZ = VZ·IZmax can blow it up.
Combining them gives the design inequality:
Rs(max) = (Vin(min) − VZ) / (IZmin + IL(max)). Pick Rs at or below this, then verify the no-load, high-line case does not exceed the diode's power rating.
Worked example. Target 5.1 V from a 9–12 V rail feeding a load that draws 0–20 mA. Use a 1N4733A (VZ = 5.1 V, 1 W, IZmin ≈ 1 mA). At Vin(min) = 9 V and IL(max) = 20 mA: Rs(max) = (9 − 5.1)/(0.001 + 0.020) = 3.9/0.021 ≈ 185 Ω. Choose a standard 180 Ω. Check the stress corner: Vin(max) = 12 V, no load, Is = (12 − 5.1)/180 = 38.3 mA, all through the diode. PZ = 5.1 × 0.0383 ≈ 0.20 W, well under the 1 W rating (and well under the ~50% derating you should apply for real ambient temperatures). Rs dissipates Is²R = 0.0383² × 180 ≈ 0.26 W, so specify a ½ W resistor.
Load and line regulation
Because the diode is not ideal, the output moves. Using the rZ model, both figures fall out cleanly:
- Load regulation: as IL rises, IZ falls by the same amount, so Vout drops by ΔIL·(rZ‖Rs) ≈ ΔIL·rZ. With rZ = 7 Ω and a 20 mA swing, that is ~140 mV of droop.
- Line regulation: a change ΔVin divides across Rs and rZ, so ΔVout = ΔVin·rZ/(Rs + rZ). For our 3 V line swing: 3 × 7/187 ≈ 112 mV.
| Metric | Expression | Example value |
|---|---|---|
| Line regulation | ΔVin·rZ/(Rs+rZ) | ≈112 mV over 9–12 V |
| Load regulation | ΔIL·rZ | ≈140 mV over 0–20 mA |
| Worst-case PZ | VZ·(Vin,max−VZ)/Rs | ≈0.20 W |
The lesson is that a small rZ buys you accuracy, but low rZ demands healthy IZ, which costs power. That trade-off is exactly why the shunt regulator is reserved for references and light loads, and why heavier rails use a series pass element instead. If you want the fuller comparison, read our companion piece on the shunt voltage regulator and the follow-on on series-pass linear regulators.
Where it still wins, and where to simulate
Zener shunts remain the go-to for on-chip and board-level references, clamping, and setting a transistor's base bias. In an IC context you will usually characterise VZ spread and tempco across process corners in a SPICE run — Cadence Spectre or Synopsys HSPICE with the foundry's diode model — because the few-percent VZ tolerance and the tempco dominate the error budget far more than rZ does. For analog layout and reliability sign-off, teams lean on Siemens Calibre PERC to catch current-density and ESD paths through the clamp. Hands-on reference design of this kind is core to the analog curriculum at ChipXpert's VLSI training.
Want to design, simulate, and sign off real analog blocks like this? The CourseTron Analog & VLSI track walks you from the Zener reference to full LDO and bandgap design with Cadence and Synopsys flows.
FAQ
Why must I keep a minimum Zener current?
Below the knee current the operating point leaves the steep breakdown region and climbs onto the soft, high-resistance part of the curve. There Vout sags well below VZ and regulation effectively stops, so always design so IZ ≥ IZmin in the worst case.
What fails first, the diode or the resistor?
Usually the diode, in the no-load high-line corner where it carries nearly all of Is. Always compute PZ at that corner and derate by at least 50% for temperature before choosing the package.
How do I improve the regulation without a different topology?
Pick a VZ near 5.6–6.2 V for low rZ and tempco, increase IZ (at a power cost), or add an emitter-follower buffer so the load current no longer steals from the diode.
Can a Zener regulate a heavy load directly?
Not efficiently. Supplying hundreds of mA would force a huge IZ and dissipate watts in Rs and the diode. For that, use the Zener only as the reference inside a series-pass or feedback regulator.