In short: A vertical DMOS power MOSFET stacks source, channel, a lightly doped drift region and the drain on opposite faces of the die, so current flows top to bottom; the drift region sets both the blocking voltage and most of Rds(on), and the unavoidable body diode lets the device conduct in reverse but adds reverse-recovery loss in hard-switched bridges.
Why power MOSFETs are vertical
A small-signal CMOS transistor in a standard process is lateral: source, gate and drain all sit on the top surface, and current runs sideways through a short channel. That layout is perfect for logic but terrible for power. To block 60 V or 600 V, the drain needs a long, lightly doped region, and in a lateral device that region would consume enormous die area while all the current crowds near the surface.
The vertical DMOS (double-diffused MOS) turns the problem on its side. The source metal and gate sit on the top face, the drain contact is the whole back of the wafer, and current travels through the thickness of the die. Blocking voltage is now set by wafer-depth parameters (epi thickness and doping), while current capability scales with how many parallel cells you tile across the area. That decoupling is the entire trick.
Anatomy of the cell
The name "double-diffused" comes from the fabrication: the p-body and the n+ source are diffused through the same polysilicon window, and the difference in their lateral diffusion defines the channel length, typically a fraction of a micron, without needing fine lithography. A planar cell has the gate on the surface; a trench cell etches the gate into the silicon so the channel runs vertically and the JFET pinch between neighbouring bodies disappears. Trench is dominant below roughly 100 V, while planar and superjunction structures dominate at high voltage.
Two features matter for reliability. The p-body is shorted to the source by the metal, which parks the parasitic NPN (source-body-drift) in the off state and prevents snap-back. And the body-to-drift junction is a p-n diode that is forever connected between source and drain. That is the body diode, not an optional extra.
Where Rds(on) comes from
On-resistance is a series chain: source contact, n+ source, channel, the accumulation layer under the gate, the JFET neck (planar only), the drift region, the substrate and the package (bond wires, leadframe). Which term dominates depends on voltage rating:
| Rating | Dominant term | Typical consequence |
|---|---|---|
| 20-40 V | Channel + package | Shrink cell pitch, go trench; wire bonds matter |
| 60-100 V | Mix of channel and drift | Shielded-gate trench balances both |
| 600 V and above | Drift region (>90%) | Superjunction charge balancing to escape the limit |
Key fact: for a conventional unipolar drift region, Rds(on) grows roughly as BV2.5. Doubling the voltage rating costs about 5-6 times the on-resistance per unit area.
That is why a 600 V planar part with the same die area as a 30 V part has a thousand times more resistance. Superjunction devices (alternating vertical p and n pillars) break that scaling by letting the drift region be heavily doped yet still fully depleted. Rds(on) also rises with temperature, around +70 to +100% from 25 °C to 150 °C, since it is mobility-limited. Always read the datasheet value at your hot junction temperature, not the 25 °C headline number.
A quick example: a 5 mΩ part at 25 °C is closer to 9 mΩ hot. At 30 A RMS that is 8.1 W of conduction loss instead of 4.5 W, and the thermal design must assume the larger one. Because resistance rises with temperature, paralleled MOSFETs share current well, as a hotter device takes less.
The body diode in practice
The body diode forward-drops about 0.7-1.0 V (higher in SiC), far above the I×Rds(on) drop of a turned-on channel. Smart designs therefore turn the channel on during reverse conduction, called synchronous rectification, and keep the diode for the short dead time only.
The problem is stored charge. The diode conducts minority carriers in the drift region; when the opposite switch turns on, those carriers must be swept out, producing a reverse-recovery current spike (Qrr). In a half-bridge this spike flows through the other FET as extra turn-on current, adding loss, ringing and EMI. Standard 600 V superjunction body diodes can have Qrr of several microcoulombs, which is why fast-recovery (FRFET-type) variants exist for motor drives and phase-shifted full bridges.
Using it as a switch
A power MOSFET is a voltage-controlled switch with a large input capacitance. Turning it on means charging Ciss through the gate driver; the time spent on the Miller plateau, where Vgs stalls while Vds collapses, sets the real switching speed. Gate charge (Qg, Qgd) matters more than capacitance numbers because capacitances are non-linear. For a deeper treatment of the plateau, dV/dt and loss calculations, see MOSFET switching characteristics.
The figure of merit for a given technology is Rds(on) × Qg for hard-switched converters and Rds(on) × Qoss for resonant ones. A typical 100 V trench part might have 4 mΩ and 60 nC; a superjunction 650 V part might have 40 mΩ and 50 nC. Pick by the loss that dominates your topology: conduction loss at low frequency, switching loss as frequency climbs.
Key fact: switching loss per cycle is roughly ½·V·I·(tr+tf) plus Qrr·V. At 400 V, 20 A and 20 ns edges that is 80 µJ per transition, which is 8 W at 100 kHz before counting diode recovery.
Design and simulation notes
- Process/device TCAD: Synopsys Sentaurus and Silvaco are used to tune epi thickness, body dose and cell pitch for BVdss versus Rds(on).
- Circuit simulation: Cadence Spectre/PSpice and Siemens Questa ADMS use vendor SPICE models; check that Qrr and Coss(V) are captured, otherwise bridge loss is under-predicted.
- Safe operating area: linear-mode operation of modern fine-pitch trench parts is limited by thermal runaway, so hot-swap and linear-regulator use needs a part with an explicit linear-mode SOA curve.
- Avalanche: rated as EAS; a well-balanced cell avalanches uniformly instead of triggering the parasitic NPN.
Power-stage layout and driver design are an important share of what Avecas design services deliver for mixed-signal power ICs, where the same DMOS structures appear as integrated LDMOS output devices. If you want to see how a stage like this gets biased and compared with other devices, our article on BJT versus MOSFET as a switch is a good next step.
Common interview questions this answers
Expect questions like "why does Rds(on) increase with voltage rating?", "what happens if the body diode is slow?", and "why does a MOSFET have a positive temperature coefficient?". Walk the interviewer through the drift region and the carrier mobility story, then bring in Qrr for the diode. Strong answers always include a number.
Ready to go deeper? Build power-stage intuition with hands-on simulation labs in the CourseTron analog design courses, or explore hardware-oriented training at ChipXpert.
FAQ
Why is the drift region so important?
It supports the blocking voltage by depleting under reverse bias, and being lightly doped and thick, it contributes most of the on-resistance in high-voltage devices.
Can I use the body diode as a freewheel diode?
Yes, for low-voltage parts and short dead times. At high voltage its recovery charge is large, so a fast-recovery MOSFET or an external Schottky or SiC diode is better.
Does Rds(on) go up or down with temperature?
It goes up, because carrier mobility drops, roughly doubling by 150 °C. This helps paralleling but hurts efficiency.
What is the difference between planar and trench DMOS?
Planar has the gate on the surface and a JFET region between bodies; trench places the gate in an etched trench, removes the JFET term and packs cells denser, lowering Rds(on) at low voltage.