In short: A MOSFET's transfer curve (ID vs VGS) shows when and how strongly the channel turns on, while the output curves (ID vs VDS) split into triode, where the device acts like a voltage-controlled resistor, and saturation, where it acts like a voltage-controlled current source.
Two curve families, two different questions
Every datasheet and every SPICE run gives you the same device in two views. The transfer characteristic fixes VDS and sweeps VGS, answering "how much current does this gate voltage buy me?" The output (drain) characteristics fix VGS at several values and sweep VDS, answering "how does the device behave as a circuit element once biased?" Interviewers love these plots because a candidate who can sketch them from memory, with correct boundaries and slopes, usually understands the physics rather than just the formulas. If you need the underlying channel formation first, read our MOSFET working principle article.
The transfer curve: from subthreshold to strong inversion
Take an NMOS with Vth = 0.5 V. Below Vth the surface is only weakly inverted, but the current is not zero. It follows an exponential law, ID ∝ exp(VGS / (n·VT)), where VT ≈ 26 mV at room temperature and the slope factor n is typically 1.2 to 1.5. That gives a subthreshold swing of roughly 60 × n ≈ 70 to 90 mV per decade, which is why leakage in a low-Vth standard cell grows tenfold for every ~80 mV you shave off the threshold.
Above Vth the gate pulls in a real inversion layer and the current becomes quadratic in the overdrive Vov = VGS − Vth. The slope of this curve is the transconductance gm, the single most important small-signal number in analog design. The two regimes blend smoothly in reality; the sharp kink at Vth in textbook plots is just a modelling convenience.
Key fact: In saturation, gm = 2·ID / Vov. At a fixed current, a smaller overdrive gives more gm per microamp, but costs a wider device and less voltage headroom.
The output curves: triode, saturation and the boundary between them
Now hold VGS constant and raise VDS from zero. While VDS is small, the channel is a uniform sheet of charge and the device is a resistor: current rises almost linearly with VDS, with slope 1/ron, where ron ≈ 1 / (μnCox·(W/L)·Vov). As VDS grows, the drain end of the channel sees a smaller gate-to-channel voltage (VGD = VGS − VDS) and the inversion charge there thins out. When VDS reaches Vov, VGD equals Vth and the channel pinches off at the drain. Beyond this point, extra drain voltage drops across a short depleted region and the current barely changes.
The boundary between the regions is therefore the parabola VDS = VGS − Vth, which is the dashed line in the figure. Memorise it as a condition on voltages, not on current: triode if VDS < Vov, saturation if VDS ≥ Vov, and cut-off if Vov ≤ 0.
Region equations at a glance
| Region | Condition | Drain current | Circuit role |
|---|---|---|---|
| Cut-off / weak inversion | VGS < Vth | ID ≈ I0·exp(VGS / nVT) | Leakage, ultra-low-power biasing |
| Triode (linear) | VGS > Vth, VDS < Vov | ID = μnCox(W/L)[Vov·VDS − VDS²/2] | Switch, resistor, pass gate |
| Saturation | VGS > Vth, VDS ≥ Vov | ID = ½μnCox(W/L)Vov²(1 + λVDS) | Amplifier, current source |
Key fact: The triode and saturation equations meet with matching value and slope at VDS = Vov, so the output curve is continuous and smooth across the boundary.
A worked example with real numbers
Assume μnCox = 200 µA/V², W/L = 10, Vth = 0.5 V and λ = 0.1 V⁻¹. Bias at VGS = 0.7 V, so Vov = 0.2 V.
- Saturation current: ID = ½ × 200 µ × 10 × 0.2² = 40 µA (ignoring λ).
- Transconductance: gm = 2ID / Vov = 2 × 40 µ / 0.2 = 400 µS.
- Output resistance: ro ≈ 1 / (λ·ID) = 1 / (0.1 × 40 µ) = 250 kΩ, so the intrinsic gain gm·ro is about 100, or 40 dB.
- Triode resistance at small VDS: ron = 1 / (200 µ × 10 × 0.2) = 2.5 kΩ, a usable analog switch only if VGS stays well above Vth.
Notice the design trade-off hiding here. Doubling L halves λ (ro doubles) but also halves the current for the same W, which is why analog designers draw long-channel devices for gain and mirrors, and digital designers use minimum length for speed.
Where the square law breaks and how tools show it
The equations above are the long-channel Level-1 picture. In a 28 nm or FinFET process, velocity saturation makes ID roughly linear in Vov instead of quadratic, mobility degrades with vertical field, and DIBL lowers Vth as VDS rises, so saturation curves tilt far more than λ alone suggests. That is why foundry models use BSIM-family equations, and why your hand calculation is a sizing starting point, not a sign-off number.
- Run a DC sweep of VGS and VDS in Synopsys HSPICE or Cadence Spectre and plot ID; compare against the hand estimate.
- Extract gm/ID and ro versus L from a sweep: a gm/ID methodology replaces the square law with measured lookup tables.
- Check that mirrors and cascodes keep VDS above Vdsat across process corners and temperature, otherwise the "current source" silently slips into triode.
Our team at Avecas applies exactly this verification discipline in analog design services, and the same habits are taught hands-on at ChipXpert's VLSI training programs. To see how these curves turn into gain and bandwidth numbers, continue with the MOSFET small-signal model.
Want to sketch, simulate and size these curves yourself? Explore the hands-on analog modules in our CourseTron courses and practise with real circuits.
Frequently Asked Questions
Why is the saturation region called "saturation" if the current still rises slightly?
The name means the channel charge near the drain has saturated: more VDS no longer increases current in the ideal model. The remaining slope comes from channel-length modulation, where the pinch-off point moves toward the source and shortens the effective L, captured by λ or equivalently the finite ro.
How do I find the region of a MOSFET quickly in an interview?
Compute Vov = VGS − Vth first. If Vov ≤ 0 it is off. Otherwise compare VDS with Vov: smaller means triode, larger or equal means saturation. For PMOS, use magnitudes of VSG, VSD and |Vth|.
Does the transfer curve change with VDS?
In saturation it barely changes apart from the λ tilt. In triode it is roughly a straight line in VGS, since ID ≈ μnCox(W/L)·Vov·VDS for small VDS, which is how Vth is often extracted from a linear-region measurement.
Why does gm/ID matter if the square law already gives gm?
Modern short-channel devices deviate from the square law, so gm/ID extracted from the actual model captures efficiency in weak, moderate and strong inversion in one consistent curve.