In short: A negative-feedback amplifier is classified by how the output is sampled (voltage=shunt, current=series) and how the feedback is mixed back at the input (voltage=series, current=shunt), and this pairing — series-shunt, shunt-shunt, shunt-series, series-series — deterministically tells you whether each port impedance is driven up or down by the loop gain factor (1+T).
Why topology, not just "feedback," decides everything
Every undergraduate learns that negative feedback trades gain for linearity, bandwidth and desensitivity. But the single most interview-relevant idea in analog design is that the same loop gain can raise or lower an impedance depending purely on where you tap the output and how you reinject the error. Get the topology wrong in a datasheet-grade spec and you will design a transimpedance stage that should present near-zero input impedance but instead sees it climb — the amplifier oscillates against the photodiode capacitance, and your bench debug costs days.
There are exactly four canonical single-loop topologies because there are two independent binary choices: the quantity being sensed at the output (a voltage across a node, or a current through a branch) and the quantity being compared at the input (a voltage in a loop, or a current at a node). This article makes those four concrete with numbers you can reproduce in a Cadence Spectre or Synopsys HSPICE .ac sweep.
Sampling and mixing: the two orthogonal choices
Sampling (output side). To sense an output voltage you connect the feedback network in parallel (shunt) with the load — a voltage divider does exactly this. To sense an output current you place the sense element in series with the load, typically a small series resistor whose voltage drop is proportional to current.
Mixing (input side). To subtract a feedback voltage from the input signal you put the feedback source in series with the input (a loop, KVL). To subtract a feedback current you inject it at a node in shunt with the input (KCL, like a virtual-ground summing junction).
Naming rule: the convention is mixing-then-sampling. "Series-shunt" means series mixing at the input and shunt (voltage) sampling at the output — i.e. a voltage amplifier. Memorize the input word first and you will never mislabel a schematic.
The master result: impedance follows the port's "quantity"
The governing identity is the same for all four topologies. With loop gain T = Aβ, the closed-loop gain is Af = A/(1+T). The impedance rules then fall out of a simple principle: series connection at a port raises that port's impedance by (1+T); shunt connection lowers it by (1+T).
| Topology | Amplifier type | Input (mixing) | Zin | Output (sampling) | Zout |
|---|---|---|---|---|---|
| Series-Shunt | Voltage (Av) | series | ↑ Zin(1+T) | shunt | ↓ Zout/(1+T) |
| Shunt-Shunt | Transimpedance (Rm) | shunt | ↓ Zin/(1+T) | shunt | ↓ Zout/(1+T) |
| Shunt-Series | Current (Ai) | shunt | ↓ Zin/(1+T) | series | ↑ Zout(1+T) |
| Series-Series | Transconductance (Gm) | series | ↑ Zin(1+T) | series | ↑ Zout(1+T) |
Interview one-liner: an ideal amplifier of each type wants the "right" terminations — a voltage amp wants Zin→∞, Zout→0; a transimpedance amp wants Zin→0, Zout→0; a current amp wants Zin→0, Zout→∞. Negative feedback pushes real circuits toward exactly those ideals, which is why the topology is chosen to match the source and load.
A worked number: the series-shunt (non-inverting) op-amp
Take a non-inverting op-amp with open-loop DC gain A = 100,000 (100 dB), native input resistance 1 MΩ and output resistance 75 Ω. Set the divider for a closed-loop gain of 10, so β = 0.1 and T = Aβ = 10,000.
- Closed-loop gain: Af = 100000 / (1+10000) ≈ 9.999 — the 1/β = 10 target, desensitized from A.
- Input resistance (series mixing): 1 MΩ × (1+10000) = 10 GΩ at DC.
- Output resistance (shunt sampling): 75 Ω / (1+10000) ≈ 7.5 mΩ at DC.
That is why a general-purpose op-amp behaves like a near-ideal voltage source: the feedback literally scales 75 Ω down to milliohms. Of course this holds only where loop gain is large — once T rolls off above the dominant pole, Zout climbs back toward 75 Ω, which is exactly the inductive-looking output impedance that destabilizes an op-amp driving a capacitive load. Understanding that interaction is pure poles-and-zeros territory.
Identifying topology on a real schematic
You rarely get a labeled block diagram. Use the two-test method on the actual transistors:
- Find the feedback element. Trace the component that connects output back to input (a resistor, a capacitor, or a tapped divider).
- Output test (sampling): short the load to ground. If the feedback signal vanishes, you were sampling voltage (shunt). If it survives, you were sampling current (series).
- Input test (mixing): if the feedback injects at the same node as the source (one node, KCL) it is shunt; if it appears in a loop with the source (KVL, e.g. into an emitter/source degeneration path) it is series.
Classic exam examples: a single resistor from collector to base is shunt-shunt (transimpedance — the basis of every TIA you'll build for an optical receiver). An emitter-degeneration resistor is series-series (transconductance). These same patterns scale straight into design-services work — see how production teams apply them at Avecas analog & mixed-signal design.
Practical caveats the textbook skips
Two-port feedback analysis (the h/g/y/z-parameter method in Sedra-Smith) assumes the β network does not load the forward amplifier. Real resistive dividers do load it, so the rigorous flow folds the β-network's input and output resistances into the "A" circuit before computing T. In a 65 nm or 28 nm CMOS flow you skip the hand algebra entirely: do a Spectre stb (stability) analysis or Middlebrook's double-injection to extract loop gain T(s) directly at the actual breakpoint, then read phase margin. Tools like Cadence Virtuoso ADE and Siemens' AFS handle the loading automatically. Hand analysis is still how you build intuition and sanity-check the simulator — which is the whole point of a good single-stage amplifier foundation before you tackle multistage loops.
Ready to design feedback loops that are stable on the first tapeout? CourseTron's Analog IC Design track walks you from these four topologies to full op-amp compensation with hands-on Cadence/Synopsys labs. Explore the courses →
Frequently asked questions
Does positive vs negative feedback change the topology names?
No. The series/shunt classification describes connection type, not sign. The sign is set by the phase of Aβ around the loop. All four topologies are analyzed as negative feedback; if the loop phase makes T negative, (1+T) can drop below 1 and impedances move the opposite way — the onset of instability.
Why does shunt-shunt feedback give low input impedance?
Because the feedback current is injected at the same node as the input (KCL summing). The amplifier's high gain holds that node near a virtual ground, so it absorbs the input current with almost no voltage swing — that is a low input impedance, ideal for sensing a current source like a photodiode.
Is loop gain T the same as the open-loop gain A?
No. A is the forward gain of the amplifier alone; T = Aβ is the gain around the entire loop and is what actually sets desensitivity, bandwidth and the (1+T) impedance factors. You can have huge A but small T if β is tiny (high closed-loop gain), which is why high-gain configurations have less feedback benefit.
How do I measure loop gain in a running transistor-level circuit?
Break the loop conceptually without breaking the DC bias: inject a test signal at a single point and measure forward and reverse transfer (Middlebrook/Tian double injection). Cadence Spectre's stb analysis automates this and reports gain and phase margin directly.
References & Further Reading
- Negative-feedback amplifier — Wikipedia (topology taxonomy and two-port analysis)
- Analog Devices — Feedback amplifier technical articles
- Texas Instruments — Op-amp feedback and stability application note
- Cadence Spectre Simulation Platform (stb loop-gain analysis)
- MIT OpenCourseWare 6.301 — Solid-State Circuits (feedback lectures)