Analog

Cascode amplifier

By CourseTron Team ·  7 min read ·  Updated Oct 2026 💬 𝕏 in f
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    In short: A cascode stacks a common-gate device on top of a common-source device so the amplifier delivers much higher output resistance and voltage gain, while shielding the input transistor from its drain so the Miller effect almost disappears and bandwidth improves.

    If you have ever wondered why nearly every modern op-amp input stage, current mirror, and RF low-noise amplifier contains a stacked pair of transistors, the answer is the cascode. It is one of the most leveraged structures in analog design: a single extra device buys you an order of magnitude in gain and a dramatic bandwidth improvement at almost no cost in headroom budgeting. This article explains the "why" with real numbers, shows the telescopic variant, and connects it to how the common-source amplifier behaves on its own.

    Why a plain common-source stage runs out of gain

    The intrinsic voltage gain of a single transistor is gm·ro. In a 180 nm or 65 nm bulk CMOS process, that product is modest: a typical NMOS might give gm ≈ 1 mS and ro ≈ 100 kΩ, so gmro ≈ 100, or 40 dB. As you shrink the channel, ro collapses because of channel-length modulation, and intrinsic gain falls toward 20–30. For a precision op-amp that needs 80–100 dB of open-loop gain, one stage is nowhere near enough.

    You cannot simply raise the load resistance forever either, because the output node must stay biased in saturation and a huge resistor eats headroom. What you really want is a load (and an output impedance) that looks enormous to small signals but drops only a small DC voltage. That is exactly what cascoding delivers.

    Cascode: common-gate M2 stacked on common-source M1 Load / I source M2 (CG) V_bias node X (low swing) M1 (CS) V_in GND V_out R_out ≈ g_m2·r_o2·r_o1CourseTron · coursetron.com
    Cascode topology: common-gate M2 stacked on common-source M1. Node X barely moves, which is the whole trick.

    The output-resistance boost, with numbers

    Looking into the drain of the cascode device M2, with M1 acting as its source degeneration, the small-signal output resistance is approximately:

    Rout ≈ gm2·ro2·ro1 + ro2 + ro1 ≈ gm2·ro2·ro1

    Plug in gm2 = 1 mS and ro1 = ro2 = 100 kΩ. A single device offered 100 kΩ; the cascode offers ≈ (1m × 100k × 100k) = 10 MΩ — a 100× multiplier, exactly gm2ro2. Pair that with a cascoded PMOS current-source load of similar impedance, and the gain of the whole stage becomes gm1·(Rout,n ∥ Rout,p), landing in the 70–80 dB range from a single stage.

    Rule of thumb: each cascode device multiplies the impedance seen at its drain by its own intrinsic gain gmro. One cascode ≈ ×100; a double (triple-stack) cascode ≈ ×10,000 — at the cost of two VDSAT of headroom.

    Output resistance (log scale): one device vs cascode 10 kΩ100 kΩ1 MΩ10 MΩ Single: 100 kΩ Cascode: ≈ 10 MΩ ×100 = g_m2·r_o2 (1 mS × 100 kΩ) g_m2 = 1 mS, r_o1 = r_o2 = 100 kΩCourseTron · coursetron.com
    Worked example: a 100 kΩ device becomes about 10 MΩ when cascoded, a 100× boost on a log axis.

    Miller reduction: the bandwidth payoff

    In a plain common-source stage, the gate-drain capacitance Cgd is multiplied by the stage gain through the Miller effect, appearing at the input as roughly Cgd·(1+|Av|). With a gain of 100, a 5 fF Cgd looks like 500 fF at the input, dragging the input pole down and wrecking bandwidth.

    The cascode breaks this. Because node X (the drain of M1) is held nearly constant by the low input impedance of the common-gate M2 — about 1/gm2 — the voltage gain from the gate of M1 to its own drain is only about −gm1/gm2 ≈ −1. The Miller multiplication of M1's Cgd drops from ×101 to roughly ×2. The large voltage swing is moved up to the output node, where it is driven by a low-impedance common-gate device rather than reflected back to the sensitive input.

    Signal path: V_in → node X (tiny swing) → V_out (full swing) V_in node X V_out swing ≈ −g_m1/g_m2 ≈ −1 full swingCourseTron · coursetron.com
    The signal packet barely perturbs node X, then expands into a large swing only at the output — why Miller feedback almost vanishes.

    The telescopic cascode op-amp

    Stack a differential pair, cascode both the input NMOS devices and the PMOS load, and you get the telescopic cascode OTA — the workhorse of high-speed, low-power analog. "Telescopic" refers to the devices lined up vertically from supply to ground like a collapsing telescope. It gives the highest gain-bandwidth per unit current and the best noise and power efficiency of the classic topologies.

    The price is headroom and output swing. A telescopic cascode stacks four transistors plus a tail current source between the rails. On a 1.2 V supply with each VDSAT ≈ 150 mV, you lose roughly 0.75 V to bias, leaving a tight output swing. It also has a tricky input/output common-mode relationship. When swing matters more than efficiency, designers switch to the folded cascode, which folds the cascode branch to a separate current path, trading some power and noise for headroom.

    TopologyGainOutput swingPower/noiseTypical use
    Single common-sourceLow (gmro)GoodBestSimple gain, RF
    Telescopic cascodeVery highLimitedExcellentHigh-speed ADC/op-amp
    Folded cascodeHighBetterGoodWide-swing, flexible CM
    Two-stage MillerHighBestModerateGeneral-purpose op-amp

    Verification tip: in Cadence Spectre or Synopsys HSPICE, run a .op and check every cascode device has VDS > VDSAT with margin. Then an AC analysis confirms the gain/phase; a pz (pole-zero) run shows the input pole pushed up versus the plain CS stage. Siemens Symphony/AFS behaves similarly for the periodic-steady-state checks in RF cascodes.

    Practical pitfalls designers hit

    • Biasing node X: the cascode gate bias must keep both devices saturated across PVT corners. A poorly chosen Vbias pushes M1 into triode at the fast corner and gain collapses.
    • Wide-swing mirrors: naive cascode current mirrors waste a Vt of headroom. Use the high-swing (Sooch) cascode bias to recover it.
    • Stability: the high output impedance makes the output pole dominant; compensation and load capacitance must be designed together, not bolted on afterward.
    • Layout matching: stacked devices need careful common-centroid layout; mismatch between the cascode and input devices degrades the very ro multiplication you built the structure for.

    Teams building production analog IP, such as the design services group at Avecas, treat cascode biasing and corner verification as a first-class checklist item rather than an afterthought.

    Ready to design cascode and telescopic op-amps hands-on in Cadence Virtuoso, from biasing to layout? Explore the analog track on our CourseTron courses page and move from theory to a tape-out-ready schematic.

    Frequently Asked Questions

    Does a cascode increase gain or bandwidth?

    Both, indirectly. It raises output resistance (and therefore voltage gain), and by suppressing the Miller effect on the input device it keeps the input pole high, preserving bandwidth. The trade-off is reduced output voltage swing.

    What is the difference between telescopic and folded cascode?

    Telescopic stacks the cascode devices in the same current branch for maximum efficiency but limited swing and a constrained common-mode range. Folded cascode routes the cascode into a separate branch, giving more output swing and common-mode flexibility at the cost of extra current and slightly higher noise.

    Why does the Miller effect almost disappear in a cascode?

    The common-gate device clamps the input transistor's drain (node X) to a near-constant voltage, so the local gain from the input gate to its own drain is only about −1. With no large voltage gain across Cgd, there is almost no Miller multiplication.

    How many cascode levels can I stack?

    Each level multiplies output resistance by gmro but costs one VDSAT of headroom. On modern low-voltage supplies you rarely go beyond a double cascode; below ~1 V, a single cascode plus gain-boosting is usually preferred.

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