BJT Transistor Characteristics

In short: A BJT's input curve is a forward-biased diode (IB versus VBE, turning on near 0.65 V), and its common-emitter output curves (IC versus VCE for fixed IB) show cutoff when both junctions are off, the active region where IC ≈ β·IB and is nearly flat, and saturation when both junctions conduct and VCE collapses to about 0.2 V.

Why the characteristic curves matter

Every analog interview eventually lands on a hand-drawn family of curves, because they compress the entire behaviour of a transistor into one picture. Biasing, gain, output swing, switching speed and even the SPICE model parameters you extract in a PDK are all read off these plots. If you have not yet built the physical intuition for carriers crossing the base, start with how an NPN BJT works, then return here to read the curves with confidence.

We use the common-emitter (CE) configuration throughout: the emitter is the shared terminal, the input is the base current IB with voltage VBE, and the output is the collector current IC with voltage VCE. A typical bench setup is an NPN such as the 2N3904 with VCC = 5 V and RC = 1 kΩ.

The input characteristic: a diode in disguise

With VCE held constant (and above a few tenths of a volt), IB versus VBE is simply the base-emitter junction diode curve. The collector current follows the exponential law IC = IS·exp(VBE/VT), where VT ≈ 25.9 mV at 300 K, and IB = IC/β. Practical consequences:

• Below about 0.5 V almost nothing flows; the "knee" appears near 0.6 to 0.7 V for silicon. This is why we say VBE(on) ≈ 0.65 V.
• Every 60 mV increase in VBE multiplies IC by ten (60 mV per decade at room temperature).
• VBE falls by roughly 2 mV per °C at constant current. This is the root of thermal runaway in power stages and the reason bandgap references combine VBE with a PTAT term.
• Raising VCE slightly shifts the input curve to the right: a wider collector-base depletion region narrows the base and reduces recombination, so IB falls a little. This feedback is usually ignored in hand analysis, but SPICE models (Gummel-Poon) capture it.

Key fact: The input resistance seen at the base is rπ = β·VT/IC. At IC = 1 mA and β = 100, rπ ≈ 2.6 kΩ, and transconductance gm = IC/VT ≈ 38.6 mA/V.

Output characteristics: reading the three regions

Hold IB at fixed steps and sweep VCE. The family above emerges, and each region corresponds to a specific junction bias combination.

Cutoff. With IB = 0 the leakage ICEO = (β+1)·ICBO flows. It is nanoamps at 25 °C but doubles roughly every 10 °C, which matters in high-temperature automotive designs.

Active. The curves are nearly horizontal because the collector acts as a current source controlled by the base. They are not perfectly flat: base-width modulation (the Early effect) gives a finite output resistance ro = (VA + VCE)/IC. For VA = 75 V and IC = 1 mA, ro ≈ 75 kΩ. This is what limits the intrinsic gain gm·ro = VA/VT to around 2,900 in a single transistor, regardless of bias current.

Saturation. When VCE drops below about VBE − 0.4 V, the collector-base junction becomes forward biased, injecting holes and electrons back and pulling the curve steeply down to the origin. Here IC is set by the external circuit, not by β·IB. The ratio IC/IB (the "forced beta") is below the real β.

Key fact: To switch a load of 5 mA reliably, design for forced β ≈ 10, i.e. IB = 0.5 mA, not β = 100. Under-driving leaves the device in the active region where it dissipates VCE × IC as heat.

The load line and a worked example

Real circuits never sweep VCE freely; the resistor forces VCE = VCC − IC·RC. For VCC = 5 V and RC = 1 kΩ, the load line runs from (VCE = 5 V, IC = 0) to (VCE = 0, IC = 5 mA). With VCE(sat) = 0.2 V, ICsat = 4.8 mA, so the minimum base current for saturation with β = 100 is 48 µA. Drive 100 µA and you are in hard saturation with forced β = 48. Drive 20 µA and the Q-point sits at IC = 2 mA, VCE = 3 V in the middle of the active region, which is where an amplifier should be biased for maximum symmetrical swing.

Saturation, storage time and why it matters for speed

Hard saturation stores excess minority charge in the base. When you try to turn the device off, that charge must be removed before the collector current drops, adding a storage delay of tens to hundreds of nanoseconds in a general-purpose BJT. Schottky-clamped logic (74LS) and Baker clamps exist purely to stop the collector-base junction from conducting. In ECL, the transistors are never allowed to saturate, which is why that family was fast. The same trade-off, depth of saturation versus switching speed, is why a 2N3904 switching at 1 MHz needs a speed-up capacitor across the base resistor.

Simulating and extracting the curves

In Cadence Spectre (ADE) or Synopsys HSPICE, a nested DC sweep reproduces the family in a few lines:

.dc VCE 0 10 0.05 IB 20u 80u 20u
.probe i(vc)
.model Q2N3904 NPN (IS=6.7f BF=416 VAF=74 ...)

Tools such as Siemens Questa ADMS and Synopsys CustomSim read the same model cards. Extracting VAF from the slope of the active region, and BF from IC/IB at mid-current, are routine PDK-characterisation steps. In production IC design the same story repeats, though many modern flows lean on MOSFETs; if you want to compare, see MOSFET I-V characteristics, and for hands-on analog layout or tape-out support the engineering team at Avecas design services works on exactly these problems.

Common interview traps

• "Is β constant?" No. It rises with IC, peaks, then falls at high injection, and increases with temperature.
• "Why is VCE(sat) not zero?" Both junctions conduct, so their forward drops partially cancel, leaving about 0.1 to 0.3 V.
• "Cutoff or saturation for a digital 0?" Cutoff gives output HIGH through the pull-up; saturation gives LOW.
• "What if I hold VBE fixed instead of IB?" The exponential makes the Q-point extremely temperature sensitive, so designers prefer current-driven or emitter-degenerated bias.

Key fact: The boundary between active and saturation is not a sharp line: the device is conventionally called saturated when VCB turns negative for an NPN, i.e. VCE < VBE.

Want to practise tracing these curves, solving bias circuits and answering real analog interview questions? Explore the CourseTron analog track in our course catalogue, or deepen your hands-on skills with ChipXpert VLSI training.

Frequently asked questions

What is the difference between input and output characteristics of a BJT?

The input characteristic plots IB against VBE at fixed VCE and looks like a forward diode. The output characteristic plots IC against VCE at fixed IB and shows the cutoff, active and saturation regions.

Why are the active-region output curves not perfectly flat?

Increasing VCE widens the collector-base depletion region and narrows the neutral base (the Early effect), raising IC slightly. The slope equals 1/ro, with ro ≈ VA/IC.

How do I know if a BJT is saturated?

Check VCE: if it is about 0.2 V or less and IC is set by the external resistor, with IC/IB less than β, the transistor is saturated.

Why does a BJT amplifier use the active region?

Only in the active region is IC controlled by IB with high output resistance, giving linear amplification with gain gm·RC.