In short: An op-amp integrator uses a resistor-fed virtual-earth node charging a feedback capacitor, so the output voltage is the negative time-integral of the input, Vout = −(1/RC)∫Vin dt — with a large parallel resistor added to stop DC drift from saturating the output.
The integrator is one of the most useful building blocks in analog signal processing. It turns a square wave into a triangle, a step into a ramp, and sits at the heart of analog PID controllers, dual-slope ADCs, ramp generators, and active filters. In this article we derive its behaviour from first principles, work through its frequency response, and show exactly why a practical design needs one extra resistor to survive in the real world.
Circuit topology and the virtual-earth idea
The classic inverting integrator takes the standard inverting amplifier and swaps the feedback resistor for a capacitor. The input signal drives a resistor R into the op-amp's inverting (−) input; the non-inverting (+) input is grounded; and a capacitor C provides feedback from the output back to the inverting node.
Two ideal op-amp rules do all the heavy lifting. First, the open-loop gain is enormous (an OP07 has roughly 400,000 V/V, a modern precision part even more), so to keep the output finite the differential input voltage must be essentially zero. Because the (+) input sits at ground, the (−) input is held at virtual ground — 0 V without actually being connected to ground. Second, the input bias current into the op-amp is negligible, so whatever current flows through R must continue on through C.
Deriving the time-domain response
Start from the two rules. The current into the resistor is set entirely by the input, because the far end of R is at virtual ground:
i(t) = Vin(t) / R
That same current flows through the capacitor. The capacitor's defining equation is i = C·dVC/dt. The voltage across C equals (virtual-ground − Vout) = −Vout, so:
Vin/R = C · d(−Vout)/dt
Rearranging and integrating both sides gives the headline result:
Vout(t) = −(1/RC) ∫ Vin(t) dt + V0
The output is the negative, scaled time-integral of the input. The constant V0 is the initial charge on the capacitor at t = 0. The product RC is the integration time constant, and 1/RC is the gain-per-second.
Worked example: With R = 100 kΩ and C = 10 nF, RC = 1 ms. Feed in a constant +1 V step. The output ramps at −Vin/RC = −1 V / 1 ms = −1000 V/s, i.e. −1 V every millisecond. A square wave in therefore produces a triangle wave out, with the slope set by RC.
Frequency response: a gain that rolls off at 20 dB/decade
Swapping to the Laplace / phasor domain, the capacitor's impedance is 1/(sC) or 1/(jωC). The integrator is just an inverting amplifier with Zf = 1/(jωC) and Zin = R, so the transfer function is:
H(jω) = −Zf/Zin = −1/(jωRC)
The magnitude is |H| = 1/(ωRC). On a Bode plot this is a straight line falling at −20 dB/decade across all frequencies — a tenfold increase in frequency divides the gain by ten. The phase is a constant +90° (the −1/j term). The key crossover is the unity-gain frequency where |H| = 1:
f0dB = 1/(2πRC)
For the 100 kΩ / 10 nF example, f0dB ≈ 159 Hz. Below this the circuit has gain greater than one; above it the gain falls below one. Note the problem lurking here: as ω → 0 (DC), the ideal gain → ∞. That is the whole difficulty with a practical integrator.
Why the ideal integrator saturates — and the fix
Real op-amps are not perfect. Two tiny DC errors — the input offset voltage VOS (typically a few hundred µV to a few mV) and the input bias current IB — look to the circuit like a small, permanent DC input. The ideal integrator has infinite gain at DC, so it faithfully integrates these errors forever, ramping the output steadily toward the supply rail until the op-amp slams into saturation. With no DC feedback path, there is nothing to stop it. In the lab you see this as the output "parking" at +13 V or −13 V within seconds, even with the input grounded.
The cure is to place a resistor Rf in parallel with the feedback capacitor. This gives the circuit a finite DC gain and a defined low-frequency path, bleeding off the accumulated error charge. The DC gain becomes −Rf/R, exactly like a normal inverting amplifier, and the transfer function becomes that of a first-order low-pass filter:
H(jω) = −Rf/R · 1/(1 + jωRfC)
Design rule of thumb: The circuit behaves as a proper integrator only above the pole frequency fp = 1/(2πRfC). Choose Rf ≥ 10R so fp sits at least a decade below the lowest signal frequency you want to integrate. With R = 100 kΩ, pick Rf = 1 MΩ: DC gain is capped at 10 (20 dB) and the integrator region starts around 16 Hz.
| Rf | DC gain (Rf/R) | Pole fp | Trade-off |
|---|---|---|---|
| none (∞) | ∞ | 0 Hz | Pure integral, but saturates on offset |
| 1 MΩ | 10 | ≈16 Hz | Stable; integrates well above 160 Hz |
| 100 kΩ | 1 | ≈159 Hz | Barely integrates — basically a filter |
A second practical touch: add a resistor equal to R∥Rf in series with the (+) input so that bias currents see matched impedances on both inputs, cancelling most of the bias-induced offset. For precision work, choose a low-offset, low-bias amplifier (a FET-input part such as the TL071 or a precision OP07), and simulate the real device in Cadence Virtuoso (Spectre) or Synopsys HSPICE with the vendor's SPICE model before committing to silicon — behavioural ideal-op-amp models will happily hide the saturation problem that the real part exhibits.
Where integrators show up
- Analog PID controllers — the "I" term is literally this circuit, accumulating error over time.
- Dual-slope (integrating) ADCs — a precision ramp built from a known integration time is the core of low-noise digital multimeters.
- Active filters and state-variable filters — two integrators plus a summer realise a tunable second-order biquad.
- Waveform generation — pairing an integrator with a comparator makes a triangle/square oscillator.
It is worth comparing the integrator with its mirror image, the op-amp differentiator circuit, which swaps R and C to produce a derivative and has the opposite rising-gain stability problem. For a broader grounding in the virtual-earth concept, revisit the inverting amplifier circuit, and see our full catalogue on the CourseTron analog courses page. Engineers who want hands-on fabrication-grade design help can also explore the custom analog IC services at Avecas VLSI design services.
Ready to master analog building blocks? CourseTron's Analog Design track walks you from virtual-earth intuition to full op-amp filter and controller design, with simulation labs in Cadence and HSPICE. Enrol in the Analog Design course →
Frequently asked questions
Why is the op-amp integrator inverting?
Because the signal is applied to the inverting (−) input through R while the (+) input is grounded. The feedback through C acts to oppose the input, so the output moves in the opposite polarity to the integral of the input — hence the minus sign in Vout = −(1/RC)∫Vin dt.
What is the purpose of the resistor across the capacitor?
It provides a DC feedback path, capping the otherwise infinite DC gain at −Rf/R. Without it, the op-amp integrates its own input offset voltage and bias current indefinitely and drifts into saturation. Rf sets a low-frequency pole below which the circuit behaves as an amplifier rather than an integrator.
At what frequency does the integrator stop working?
The practical integrator only integrates above the pole frequency fp = 1/(2πRfC). Below fp the gain flattens to Rf/R. It is also limited at high frequency by the op-amp's finite gain-bandwidth product, where the real gain falls short of the ideal 1/(ωRC) line.
What does an integrator do to a square wave?
It converts it into a triangle wave. During each flat half-cycle the input is constant, so the output ramps at a constant slope −Vin/RC; when the input flips polarity the slope reverses, producing the characteristic triangle.