RS-232 Serial Communication

In short: RS-232 is an asynchronous serial link in which each byte is wrapped in a start bit, optional parity and stop bit(s), sent at an agreed baud rate using inverted, high-voltage levels (about ±5 to ±15 V) that a chip like the MAX232 generates from a single 5 V supply, with RTS/CTS or XON/XOFF handshaking to prevent overruns.

Why RS-232 still matters

RS-232 is more than forty years old, yet you will still meet it on console ports of routers, bench instruments, CNC controllers, GPS modules and the debug header of nearly every SoC bring-up board. It is also a favourite interview topic because it exposes three skills at once: protocol framing, analog signalling and clock-error budgeting. Before reading further, it helps to keep the pin map handy; our RS-232 pin configuration guide covers the DB9 and DB25 connectors in detail.

Note the difference in vocabulary. UART is the logic block inside a chip that turns bytes into a bit stream. RS-232 (formally EIA/TIA-232) is the electrical and connector standard for carrying that stream between two boxes. The UART speaks 0 V/5 V (or 0 V/3.3 V); RS-232 speaks something very different, and the gap between them is exactly what a level shifter bridges.

Asynchronous framing: start, data, parity, stop

There is no clock wire. Both ends agree beforehand on a baud rate, and the receiver recovers timing from the data itself. When the line is idle it sits at logic 1 (called mark). To send a byte the transmitter pulls the line low for one bit time, the start bit. That falling edge tells the receiver to start its local timer. Then come 5 to 9 data bits, least-significant bit first, an optional parity bit, and finally one or two stop bits that return the line to mark, guaranteeing a falling edge is available for the next frame.

Key fact: the common "8N1" setting (8 data bits, no parity, 1 stop bit) uses 10 bit-times per byte, so only 80% of the raw baud rate carries payload.

Parity

Parity adds one bit so the total count of 1s is even (even parity) or odd (odd parity). It catches any single-bit error but misses every two-bit error, so it is a cheap sanity check rather than real protection. For the byte above, bits 0 and 6 are set, so even parity appends a 0. When a received frame fails the check, the UART raises a parity-error flag. Two sibling flags are worth knowing: a framing error (stop bit sampled as 0) and an overrun error (new byte arrived before software read the previous one).

Baud rate, bit time and clock tolerance

Baud is symbols per second; on a two-level RS-232 line it equals bits per second. Bit time is simply 1/baud.

Because the receiver re-synchronises at every start bit, clock error only has to stay small over one frame. It samples in the middle of each bit (UARTs typically oversample 16x and take the vote around count 8). By the tenth bit the sampling point has drifted by nine and a half bit-times of accumulated mismatch, and it must still land inside the correct bit. Budgeting for roughly half a bit of drift gives a theoretical limit near ±5% total mismatch; real designs aim for ±2% at each end.

This is why the 11.0592 MHz crystal is a classic on 8051 boards: with the timer reloaded to 0xFD it yields exactly 9,600 baud. A 12 MHz crystal gives about 10,417 baud, an 8.5% error that produces garbage characters. In RTL you reproduce this with a baud-tick divider, and simulators such as Synopsys VCS, Cadence Xcelium or Siemens Questa are routinely used to sweep the receiver's tolerance by skewing the testbench clock. Our UART baud rate generator article walks through the divider design.

Voltage levels: why the MAX232 exists

RS-232 is a single-ended, bipolar standard and it is inverted relative to TTL. A logic 1 (mark) is a negative voltage, −3 V to −15 V at the receiver; a logic 0 (space) is positive, +3 V to +15 V. Drivers must deliver at least ±5 V into a 3 kΩ to 7 kΩ load, and the region between −3 V and +3 V is undefined, which gives a healthy noise margin. A microcontroller pin that only swings 0 to 5 V cannot do this directly.

The MAX232 (and its many second sources) solves it with an on-chip charge pump. Two switched-capacitor stages first double +5 V to about +10 V, then invert that to about −10 V. The chip includes two transmitters (TTL to RS-232) and two receivers (RS-232 to TTL), so one device handles TXD, RXD, RTS and CTS. The original part needs four 1 µF capacitors; the MAX232A variant works with 0.1 µF. Output swing is typically ±8 V under load, comfortably beyond the ±5 V minimum.

Key fact: the MAX232 inverts: TTL idle-high (1) leaves the chip as about −8 V (mark), and a TTL 0 leaves as about +8 V (space).

Watching the bits move

The animation below shows the receiver's view of one frame. A sampling marker steps through each bit cell and latches the value at its centre, which is how a UART shifts the serial stream into a parallel register.

Handshaking and flow control

A fast sender can overrun a slow receiver, so RS-232 defines ways to say "wait". There are two families.

• Hardware (RTS/CTS): the sender asserts Request To Send; the receiver answers with Clear To Send only while its buffer has room. This is reliable and works for binary data.
• DTR/DSR: Data Terminal Ready and Data Set Ready indicate that each device is powered and present, and some printers use them as flow-control lines.
• Software (XON/XOFF): the receiver sends byte 0x13 (XOFF) to pause and 0x11 (XON) to resume over the ordinary data path. It needs no extra wires but cannot carry raw binary, since those two values would be misread.

Connecting two DTE devices, such as two PCs, needs a null modem cable that crosses TXD with RXD and RTS with CTS. This crossing is the most common reason a "dead" link works the moment you swap a cable.

Practical limits and interview traps

• The classic specification limits cable capacitance to 2,500 pF, which is roughly 15 m of typical cable; slower baud rates stretch this.
• Drivers have a slew-rate limit of 30 V/µs to cut crosstalk, which also caps the usable data rate.
• Grounds are shared, so large ground offsets between buildings corrupt data; RS-422/485 differential signalling or opto-isolation fixes that.
• Always check that both ends agree on baud, data bits, parity and stop bits. A mismatch typically shows up as framing errors, not silence.

If you want hands-on practice designing UART IP and PCB bring-up flows, the engineers at Avecas design services build exactly such interfaces for customers.

Ready to go deeper? Explore the full embedded and VLSI protocol track on the CourseTron courses page and build UART, SPI and I2C blocks hands-on.

FAQ

What does 8N1 mean?

It means 8 data bits, no parity bit and 1 stop bit. Together with the start bit that makes 10 bit-times per byte.

Why is a MAX232 needed between a microcontroller and a PC serial port?

The microcontroller uses 0 V/5 V logic, whereas RS-232 uses inverted levels around ±5 to ±15 V. The MAX232 generates those voltages from a single 5 V supply and inverts the signal.

How accurate must the baud rate be?

Since the receiver samples mid-bit and resynchronises each frame, a total mismatch of a few percent is tolerable; aim for under 2% per side. A 12 MHz 8051 at 9,600 baud misses by about 8.5% and fails.

RTS/CTS or XON/XOFF?

Use RTS/CTS for binary data and high speeds because it needs no data-path bytes. XON/XOFF is fine for text terminals where adding wires is inconvenient.